@@ -878,6 +878,7 @@ int cs35l41_set_channels(struct device *dev, struct regmap *reg,
int cs35l41_gpio_config(struct regmap *regmap, struct cs35l41_hw_cfg *hw_cfg);
int cs35l41_set_cspl_mbox_cmd(struct device *dev, struct regmap *regmap,
enum cs35l41_cspl_mbox_cmd cmd);
+int cs35l41_write_fs_errata(struct device *dev, struct regmap *regmap);
int cs35l41_init_boost(struct device *dev, struct regmap *regmap,
struct cs35l41_hw_cfg *hw_cfg);
bool cs35l41_safe_reset(struct regmap *regmap, enum cs35l41_boost_type b_type);
@@ -667,6 +667,25 @@ static const struct reg_sequence cs35l41_revb2_errata_patch[] = {
{ CS35L41_AMP_GAIN_CTRL, 0x00000000 },
};
+static const struct reg_sequence cs35l41_fs_errata_patch[] = {
+ { CS35L41_DSP1_RX1_RATE, 0x00000001 },
+ { CS35L41_DSP1_RX2_RATE, 0x00000001 },
+ { CS35L41_DSP1_RX3_RATE, 0x00000001 },
+ { CS35L41_DSP1_RX4_RATE, 0x00000001 },
+ { CS35L41_DSP1_RX5_RATE, 0x00000001 },
+ { CS35L41_DSP1_RX6_RATE, 0x00000001 },
+ { CS35L41_DSP1_RX7_RATE, 0x00000001 },
+ { CS35L41_DSP1_RX8_RATE, 0x00000001 },
+ { CS35L41_DSP1_TX1_RATE, 0x00000001 },
+ { CS35L41_DSP1_TX2_RATE, 0x00000001 },
+ { CS35L41_DSP1_TX3_RATE, 0x00000001 },
+ { CS35L41_DSP1_TX4_RATE, 0x00000001 },
+ { CS35L41_DSP1_TX5_RATE, 0x00000001 },
+ { CS35L41_DSP1_TX6_RATE, 0x00000001 },
+ { CS35L41_DSP1_TX7_RATE, 0x00000001 },
+ { CS35L41_DSP1_TX8_RATE, 0x00000001 },
+};
+
static const struct cs35l41_otp_map_element_t cs35l41_otp_map_map[] = {
{
.id = 0x01,
@@ -1265,6 +1284,19 @@ int cs35l41_set_cspl_mbox_cmd(struct device *dev, struct regmap *regmap,
}
EXPORT_SYMBOL_GPL(cs35l41_set_cspl_mbox_cmd);
+int cs35l41_write_fs_errata(struct device *dev, struct regmap *regmap)
+{
+ int ret;
+
+ ret = regmap_multi_reg_write(regmap, cs35l41_fs_errata_patch,
+ ARRAY_SIZE(cs35l41_fs_errata_patch));
+ if (ret < 0)
+ dev_err(dev, "Failed to write fs errata: %d\n", ret);
+
+ return ret;
+}
+EXPORT_SYMBOL_GPL(cs35l41_write_fs_errata);
+
MODULE_DESCRIPTION("CS35L41 library");
MODULE_AUTHOR("David Rhodes, Cirrus Logic Inc, <david.rhodes@cirrus.com>");
MODULE_AUTHOR("Lucas Tanure, Cirrus Logic Inc, <tanureal@opensource.cirrus.com>");
@@ -1093,25 +1093,6 @@ static int cs35l41_handle_pdata(struct device *dev, struct cs35l41_hw_cfg *hw_cf
return 0;
}
-static const struct reg_sequence cs35l41_fs_errata_patch[] = {
- { CS35L41_DSP1_RX1_RATE, 0x00000001 },
- { CS35L41_DSP1_RX2_RATE, 0x00000001 },
- { CS35L41_DSP1_RX3_RATE, 0x00000001 },
- { CS35L41_DSP1_RX4_RATE, 0x00000001 },
- { CS35L41_DSP1_RX5_RATE, 0x00000001 },
- { CS35L41_DSP1_RX6_RATE, 0x00000001 },
- { CS35L41_DSP1_RX7_RATE, 0x00000001 },
- { CS35L41_DSP1_RX8_RATE, 0x00000001 },
- { CS35L41_DSP1_TX1_RATE, 0x00000001 },
- { CS35L41_DSP1_TX2_RATE, 0x00000001 },
- { CS35L41_DSP1_TX3_RATE, 0x00000001 },
- { CS35L41_DSP1_TX4_RATE, 0x00000001 },
- { CS35L41_DSP1_TX5_RATE, 0x00000001 },
- { CS35L41_DSP1_TX6_RATE, 0x00000001 },
- { CS35L41_DSP1_TX7_RATE, 0x00000001 },
- { CS35L41_DSP1_TX8_RATE, 0x00000001 },
-};
-
static int cs35l41_dsp_init(struct cs35l41_private *cs35l41)
{
struct wm_adsp *dsp;
@@ -1132,12 +1113,9 @@ static int cs35l41_dsp_init(struct cs35l41_private *cs35l41)
dsp->cs_dsp.num_mems = ARRAY_SIZE(cs35l41_dsp1_regions);
dsp->cs_dsp.lock_regions = 0xFFFFFFFF;
- ret = regmap_multi_reg_write(cs35l41->regmap, cs35l41_fs_errata_patch,
- ARRAY_SIZE(cs35l41_fs_errata_patch));
- if (ret < 0) {
- dev_err(cs35l41->dev, "Failed to write fs errata: %d\n", ret);
+ ret = cs35l41_write_fs_errata(cs35l41->dev, cs35l41->regmap);
+ if (ret < 0)
return ret;
- }
ret = wm_halo_init(dsp);
if (ret) {