| Message ID | 20220530040151.95221-3-hui.wang@canonical.com (mailing list archive) |
|---|---|
| State | Accepted |
| Commit | fed3d9297a9bf8b342c034e74a1fdba6940fe84a |
| Headers | show |
| Series | Switch to use internal PLL for iMCLK | expand |
Hi Mark, I saw you merged the [PATCH 1/2], the [PATCH 2/2] is also needed. Please take a look. Thanks, Hui. On 5/30/22 12:01, Hui Wang wrote: > After finishing the playback or recording, the machine driver might > call snd_soc_dai_set_pll(codec, pll_id, 0, 0, 0) to stop the internal > PLL, but with the codec driver nau8822, it will print error as below: > nau8822 0-001a: Unsupported input clock 0 > fsl-asoc-card sound-nau8822: failed to stop FLL: -22 > > Refer to the function wm8962_set_fll() in the codec driver wm8962, if > the freq_out is zero, turn off the internal PLL and return 0. > > Cc: David Lin <ctlin0@nuvoton.com> > Cc: John Hsu <kchsu0@nuvoton.com> > Cc: Seven Li <wtli@nuvoton.com> > Signed-off-by: Hui Wang <hui.wang@canonical.com> > --- > sound/soc/codecs/nau8822.c | 7 +++++++ > 1 file changed, 7 insertions(+) > > diff --git a/sound/soc/codecs/nau8822.c b/sound/soc/codecs/nau8822.c > index b436e532993d..4d3720c69f91 100644 > --- a/sound/soc/codecs/nau8822.c > +++ b/sound/soc/codecs/nau8822.c > @@ -726,6 +726,13 @@ static int nau8822_set_pll(struct snd_soc_dai *dai, int pll_id, int source, > struct nau8822_pll *pll_param = &nau8822->pll; > int ret, fs; > > + if (freq_out == 0) { > + dev_dbg(component->dev, "PLL disabled\n"); > + snd_soc_component_update_bits(component, > + NAU8822_REG_POWER_MANAGEMENT_1, NAU8822_PLL_EN_MASK, NAU8822_PLL_OFF); > + return 0; > + } > + > fs = freq_out / 256; > > ret = nau8822_calc_pll(freq_in, fs, pll_param);
On Thu, Jun 02, 2022 at 10:12:06AM +0800, Hui Wang wrote: > Hi Mark, > > I saw you merged the [PATCH 1/2], the [PATCH 2/2] is also needed. Please > take a look. Patch 2 isn't a bug fix, it's a new feature so will need to wait until after the merge window.
OK, got it. Thanks. On 6/2/22 16:39, Mark Brown wrote: > On Thu, Jun 02, 2022 at 10:12:06AM +0800, Hui Wang wrote: >> Hi Mark, >> >> I saw you merged the [PATCH 1/2], the [PATCH 2/2] is also needed. Please >> take a look. > Patch 2 isn't a bug fix, it's a new feature so will need to wait > until after the merge window.
diff --git a/sound/soc/codecs/nau8822.c b/sound/soc/codecs/nau8822.c index b436e532993d..4d3720c69f91 100644 --- a/sound/soc/codecs/nau8822.c +++ b/sound/soc/codecs/nau8822.c @@ -726,6 +726,13 @@ static int nau8822_set_pll(struct snd_soc_dai *dai, int pll_id, int source, struct nau8822_pll *pll_param = &nau8822->pll; int ret, fs; + if (freq_out == 0) { + dev_dbg(component->dev, "PLL disabled\n"); + snd_soc_component_update_bits(component, + NAU8822_REG_POWER_MANAGEMENT_1, NAU8822_PLL_EN_MASK, NAU8822_PLL_OFF); + return 0; + } + fs = freq_out / 256; ret = nau8822_calc_pll(freq_in, fs, pll_param);
After finishing the playback or recording, the machine driver might call snd_soc_dai_set_pll(codec, pll_id, 0, 0, 0) to stop the internal PLL, but with the codec driver nau8822, it will print error as below: nau8822 0-001a: Unsupported input clock 0 fsl-asoc-card sound-nau8822: failed to stop FLL: -22 Refer to the function wm8962_set_fll() in the codec driver wm8962, if the freq_out is zero, turn off the internal PLL and return 0. Cc: David Lin <ctlin0@nuvoton.com> Cc: John Hsu <kchsu0@nuvoton.com> Cc: Seven Li <wtli@nuvoton.com> Signed-off-by: Hui Wang <hui.wang@canonical.com> --- sound/soc/codecs/nau8822.c | 7 +++++++ 1 file changed, 7 insertions(+)