From patchwork Wed Jun 22 06:22:45 2022 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Tinghan Shen X-Patchwork-Id: 12890228 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from alsa0.perex.cz (alsa0.perex.cz [77.48.224.243]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id 5360FC43334 for ; Wed, 22 Jun 2022 06:25:00 +0000 (UTC) Received: from alsa1.perex.cz (alsa1.perex.cz [207.180.221.201]) (using TLSv1.2 with cipher AECDH-AES256-SHA (256/256 bits)) (No client certificate requested) by alsa0.perex.cz (Postfix) with ESMTPS id 9612A1F5C; Wed, 22 Jun 2022 08:24:08 +0200 (CEST) DKIM-Filter: OpenDKIM Filter v2.11.0 alsa0.perex.cz 9612A1F5C DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=alsa-project.org; s=default; t=1655879098; bh=u3X8j0aQOk6m0Qmng1sMZzo8XgxdrWDd5lKTvYED25c=; h=From:To:Subject:Date:In-Reply-To:References:Cc:List-Id: List-Unsubscribe:List-Archive:List-Post:List-Help:List-Subscribe: From; b=PBx5BLLh2EldudSgKmtWO3lxb5TQHcaYVvT/8uT/I4GfUsBZZBjq2qIZAwPwicAPb FiYWHAL57AKM9Q3A9SzSjvNk6Roeocdoc+Nt5LmD+4BCcm2N33kD9sOnGL/U5qav5Y 7BCZKqL0DEHZZA6TxJ0R1VxKSd7CwpxG+sGff/XA= Received: from alsa1.perex.cz (localhost.localdomain [127.0.0.1]) by alsa1.perex.cz (Postfix) with ESMTP id A5D28F8032D; Wed, 22 Jun 2022 08:24:07 +0200 (CEST) Received: by alsa1.perex.cz (Postfix, from userid 50401) id 84127F80482; Wed, 22 Jun 2022 08:24:06 +0200 (CEST) Received: from mailgw01.mediatek.com (unknown [60.244.123.138]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by alsa1.perex.cz (Postfix) with ESMTPS id EF671F8032D; Wed, 22 Jun 2022 08:23:00 +0200 (CEST) DKIM-Filter: OpenDKIM Filter v2.11.0 alsa1.perex.cz EF671F8032D X-UUID: 76fa46e451e5465b809a2311a8e95adc-20220622 X-CID-P-RULE: Release_Ham X-CID-O-INFO: VERSION:1.1.6, REQID:915b2812-44d5-49d4-b3b5-763d45cae09f, OB:0, LO B:0,IP:0,URL:0,TC:0,Content:-5,EDM:0,RT:0,SF:0,FILE:0,RULE:Release_Ham,ACT ION:release,TS:-5 X-CID-META: VersionHash:b14ad71, CLOUDID:f9c82fea-f7af-4e69-92ee-0fd74a0c286c, C OID:IGNORED,Recheck:0,SF:nil,TC:nil,Content:0,EDM:-3,IP:nil,URL:0,File:nil ,QS:nil,BEC:nil,COL:0 X-UUID: 76fa46e451e5465b809a2311a8e95adc-20220622 Received: from mtkmbs11n2.mediatek.inc [(172.21.101.187)] by mailgw01.mediatek.com (envelope-from ) (Generic MTA with TLSv1.2 ECDHE-RSA-AES256-GCM-SHA384 256/256) with ESMTP id 2090030197; Wed, 22 Jun 2022 14:22:48 +0800 Received: from mtkmbs07n1.mediatek.inc (172.21.101.16) by mtkmbs10n1.mediatek.inc (172.21.101.34) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_CBC_SHA384) id 15.2.792.15; Wed, 22 Jun 2022 14:22:48 +0800 Received: from mtkmbs11n2.mediatek.inc (172.21.101.187) by mtkmbs07n1.mediatek.inc (172.21.101.16) with Microsoft SMTP Server (TLS) id 15.0.1497.2; Wed, 22 Jun 2022 14:22:47 +0800 Received: from mtksdccf07.mediatek.inc (172.21.84.99) by mtkmbs11n2.mediatek.inc (172.21.101.73) with Microsoft SMTP Server id 15.2.792.3 via Frontend Transport; Wed, 22 Jun 2022 14:22:47 +0800 From: Tinghan Shen To: Rob Herring , Krzysztof Kozlowski , Matthias Brugger , Pierre-Louis Bossart , Liam Girdwood , Peter Ujfalusi , Bard Liao , Ranjani Sridharan , Kai Vehmanen , Daniel Baluta , "Mark Brown" , Jaroslav Kysela , Takashi Iwai , Tinghan Shen , YC Hung , Curtis Malainey , "Allen-KH Cheng" Subject: [PATCH v4 4/4] ASoC: SOF: mediatek: Align mt8186 clock names with dt-bindings Date: Wed, 22 Jun 2022 14:22:45 +0800 Message-ID: <20220622062245.21021-5-tinghan.shen@mediatek.com> X-Mailer: git-send-email 2.18.0 In-Reply-To: <20220622062245.21021-1-tinghan.shen@mediatek.com> References: <20220622062245.21021-1-tinghan.shen@mediatek.com> MIME-Version: 1.0 X-MTK: N Cc: devicetree@vger.kernel.org, alsa-devel@alsa-project.org, linux-kernel@vger.kernel.org, Project_Global_Chrome_Upstream_Group@mediatek.com, linux-mediatek@lists.infradead.org, linux-arm-kernel@lists.infradead.org, sound-open-firmware@alsa-project.org X-BeenThere: alsa-devel@alsa-project.org X-Mailman-Version: 2.1.15 Precedence: list List-Id: "Alsa-devel mailing list for ALSA developers - http://www.alsa-project.org" List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: alsa-devel-bounces@alsa-project.org Sender: "Alsa-devel" Align clock names in mt8186 dsp driver with dt-bindings. Signed-off-by: Tinghan Shen --- sound/soc/sof/mediatek/mt8186/mt8186-clk.c | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-) diff --git a/sound/soc/sof/mediatek/mt8186/mt8186-clk.c b/sound/soc/sof/mediatek/mt8186/mt8186-clk.c index 22220fd50b62..2df3b7ae1c6f 100644 --- a/sound/soc/sof/mediatek/mt8186/mt8186-clk.c +++ b/sound/soc/sof/mediatek/mt8186/mt8186-clk.c @@ -18,8 +18,8 @@ #include "mt8186-clk.h" static const char *adsp_clks[ADSP_CLK_MAX] = { - [CLK_TOP_AUDIODSP] = "audiodsp_sel", - [CLK_TOP_ADSP_BUS] = "adsp_bus_sel", + [CLK_TOP_AUDIODSP] = "audiodsp", + [CLK_TOP_ADSP_BUS] = "adsp_bus", }; int mt8186_adsp_init_clock(struct snd_sof_dev *sdev)