diff mbox series

[10/12] ASoC: Intel: avs: Replace hardcodes with SD_CTL_STREAM_RESET

Message ID 20220707124153.1858249-11-cezary.rojewski@intel.com (mailing list archive)
State Accepted
Commit 4b38bd16ca6d8b16c1dc2cc4aa61663193b0b893
Headers show
Series ASoC: Intel: avs: Updates and cleanups | expand

Commit Message

Cezary Rojewski July 7, 2022, 12:41 p.m. UTC 
Improve readability of CLDMA reset operation by making use of
already defined SD_CTL_STREAM_RESET.

Signed-off-by: Cezary Rojewski <cezary.rojewski@intel.com>
---
 sound/soc/intel/avs/cldma.c | 12 ++++++------
 1 file changed, 6 insertions(+), 6 deletions(-)
diff mbox series

Patch

diff --git a/sound/soc/intel/avs/cldma.c b/sound/soc/intel/avs/cldma.c
index d100c6ba4d8a..d7a9390b5e48 100644
--- a/sound/soc/intel/avs/cldma.c
+++ b/sound/soc/intel/avs/cldma.c
@@ -176,17 +176,17 @@  int hda_cldma_reset(struct hda_cldma *cl)
 		return ret;
 	}
 
-	snd_hdac_stream_updateb(cl, SD_CTL, 1, 1);
-	ret = snd_hdac_stream_readb_poll(cl, SD_CTL, reg, (reg & 1), AVS_CL_OP_INTERVAL_US,
-					 AVS_CL_OP_TIMEOUT_US);
+	snd_hdac_stream_updateb(cl, SD_CTL, SD_CTL_STREAM_RESET, SD_CTL_STREAM_RESET);
+	ret = snd_hdac_stream_readb_poll(cl, SD_CTL, reg, (reg & SD_CTL_STREAM_RESET),
+					 AVS_CL_OP_INTERVAL_US, AVS_CL_OP_TIMEOUT_US);
 	if (ret < 0) {
 		dev_err(cl->dev, "cldma set SRST failed: %d\n", ret);
 		return ret;
 	}
 
-	snd_hdac_stream_updateb(cl, SD_CTL, 1, 0);
-	ret = snd_hdac_stream_readb_poll(cl, SD_CTL, reg, !(reg & 1), AVS_CL_OP_INTERVAL_US,
-					 AVS_CL_OP_TIMEOUT_US);
+	snd_hdac_stream_updateb(cl, SD_CTL, SD_CTL_STREAM_RESET, 0);
+	ret = snd_hdac_stream_readb_poll(cl, SD_CTL, reg, !(reg & SD_CTL_STREAM_RESET),
+					 AVS_CL_OP_INTERVAL_US, AVS_CL_OP_TIMEOUT_US);
 	if (ret < 0) {
 		dev_err(cl->dev, "cldma unset SRST failed: %d\n", ret);
 		return ret;