From patchwork Wed Aug 17 13:11:35 2022 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Patchwork-Submitter: =?utf-8?q?Amadeusz_S=C5=82awi=C5=84ski?= X-Patchwork-Id: 12945859 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from alsa0.perex.cz (alsa0.perex.cz [77.48.224.243]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id 2FB08C32771 for ; Wed, 17 Aug 2022 13:12:40 +0000 (UTC) Received: from alsa1.perex.cz (alsa1.perex.cz [207.180.221.201]) (using TLSv1.2 with cipher AECDH-AES256-SHA (256/256 bits)) (No client certificate requested) by alsa0.perex.cz (Postfix) with ESMTPS id 51AD2165E; Wed, 17 Aug 2022 15:11:48 +0200 (CEST) DKIM-Filter: OpenDKIM Filter v2.11.0 alsa0.perex.cz 51AD2165E DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=alsa-project.org; s=default; t=1660741958; bh=WeXg1qGK5oHjX2LzaydOvVCoa4HLF6ZfQTJlOzwHso0=; h=From:To:Subject:Date:In-Reply-To:References:Cc:List-Id: List-Unsubscribe:List-Archive:List-Post:List-Help:List-Subscribe: From; b=dnEZ8vxoqkOisrWFo1KTZxfsNrE2EhWRZU0N81KqCq6BVh9tJVa2LL2qTHVTtVHFZ LPAWcBD3xVj+E+Q252LSpQqYRbBR4TeoqduUwNHKcKAsIGgM6cEibPz6cO1Vm3BzBg qy2lcMDmKfWq1tvbZDHPMFvCVbWBS3eo6f89LzFc= Received: from alsa1.perex.cz (localhost.localdomain [127.0.0.1]) by alsa1.perex.cz (Postfix) with ESMTP id 0DF90F80534; Wed, 17 Aug 2022 15:11:25 +0200 (CEST) Received: by alsa1.perex.cz (Postfix, from userid 50401) id A62BEF80544; Wed, 17 Aug 2022 15:11:21 +0200 (CEST) Received: from mga01.intel.com (mga01.intel.com [192.55.52.88]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by alsa1.perex.cz (Postfix) with ESMTPS id D0D86F800DA for ; Wed, 17 Aug 2022 15:11:14 +0200 (CEST) DKIM-Filter: OpenDKIM Filter v2.11.0 alsa1.perex.cz D0D86F800DA Authentication-Results: alsa1.perex.cz; dkim=pass (2048-bit key) header.d=intel.com header.i=@intel.com header.b="bJ/xHCQM" DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=intel.com; i=@intel.com; q=dns/txt; s=Intel; t=1660741876; x=1692277876; h=from:to:cc:subject:date:message-id:in-reply-to: references:mime-version:content-transfer-encoding; bh=WeXg1qGK5oHjX2LzaydOvVCoa4HLF6ZfQTJlOzwHso0=; b=bJ/xHCQMABeCk+wM5DEo5JL018HFqtIAoSvwPzLuYPa22Zayy36eCC4a dVccBe9JHz4jfNdk8m4+U+jQxYsNFb44s7DATI/VY4CsButCsUg7EsyGv 1s8M5oCUrDaUe7fZP++M2lkT0WTHNBDXeyBsYmiw90FSckmMNXGvAg8np tINJHUr7yfvJ9xB290WJJRXnbtATMBe/8lh4TgSNEt456hKbqWNpFoqMg Oi+334xokuVsx5sCqLaNx25nLDbPeJNcznBkKlnxIIezNyirmK+oUUfbV XZEvJGaKHVu5H0usl9D1cqW3KtjLu7hs5+WtC3QkOz4WwtRDx++jueEM7 g==; X-IronPort-AV: E=McAfee;i="6500,9779,10442"; a="318496076" X-IronPort-AV: E=Sophos;i="5.93,243,1654585200"; d="scan'208";a="318496076" Received: from fmsmga008.fm.intel.com ([10.253.24.58]) by fmsmga101.fm.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 17 Aug 2022 06:11:12 -0700 X-ExtLoop1: 1 X-IronPort-AV: E=Sophos;i="5.93,243,1654585200"; d="scan'208";a="667609957" Received: from dev2 (HELO DEV2.igk.intel.com) ([10.237.148.94]) by fmsmga008.fm.intel.com with ESMTP; 17 Aug 2022 06:11:11 -0700 From: =?utf-8?q?Amadeusz_S=C5=82awi=C5=84ski?= To: Takashi Iwai , alsa-devel@alsa-project.org Subject: [PATCH 2/4] ALSA: hda: Rework snd_hdac_stream_reset() to use macros Date: Wed, 17 Aug 2022 15:11:35 +0200 Message-Id: <20220817131137.3978523-3-amadeuszx.slawinski@linux.intel.com> X-Mailer: git-send-email 2.25.1 In-Reply-To: <20220817131137.3978523-1-amadeuszx.slawinski@linux.intel.com> References: <20220817131137.3978523-1-amadeuszx.slawinski@linux.intel.com> MIME-Version: 1.0 Cc: Cezary Rojewski , =?utf-8?q?Amadeusz_S=C5=82a?= =?utf-8?q?wi=C5=84ski?= , linux-kernel@vger.kernel.org, Pierre-Louis Bossart X-BeenThere: alsa-devel@alsa-project.org X-Mailman-Version: 2.1.15 Precedence: list List-Id: "Alsa-devel mailing list for ALSA developers - http://www.alsa-project.org" List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: alsa-devel-bounces@alsa-project.org Sender: "Alsa-devel" We can use existing macros to poll and update register values instead of open coding the functionality. Signed-off-by: Amadeusz Sławiński --- sound/hda/hdac_stream.c | 27 +++++++-------------------- 1 file changed, 7 insertions(+), 20 deletions(-) diff --git a/sound/hda/hdac_stream.c b/sound/hda/hdac_stream.c index f3582012d22f..ce6a2f270445 100644 --- a/sound/hda/hdac_stream.c +++ b/sound/hda/hdac_stream.c @@ -10,6 +10,7 @@ #include #include #include +#include #include #include "trace.h" @@ -165,7 +166,6 @@ EXPORT_SYMBOL_GPL(snd_hdac_stop_streams_and_chip); void snd_hdac_stream_reset(struct hdac_stream *azx_dev) { unsigned char val; - int timeout; int dma_run_state; snd_hdac_stream_clear(azx_dev); @@ -173,30 +173,17 @@ void snd_hdac_stream_reset(struct hdac_stream *azx_dev) dma_run_state = snd_hdac_stream_readb(azx_dev, SD_CTL) & SD_CTL_DMA_START; snd_hdac_stream_updateb(azx_dev, SD_CTL, 0, SD_CTL_STREAM_RESET); - udelay(3); - timeout = 300; - do { - val = snd_hdac_stream_readb(azx_dev, SD_CTL) & - SD_CTL_STREAM_RESET; - if (val) - break; - } while (--timeout); + + /* wait for hardware to report that the stream entered reset */ + snd_hdac_stream_readb_poll(azx_dev, SD_CTL, val, (val & SD_CTL_STREAM_RESET), 3, 300); if (azx_dev->bus->dma_stop_delay && dma_run_state) udelay(azx_dev->bus->dma_stop_delay); - val &= ~SD_CTL_STREAM_RESET; - snd_hdac_stream_writeb(azx_dev, SD_CTL, val); - udelay(3); + snd_hdac_stream_updateb(azx_dev, SD_CTL, SD_CTL_STREAM_RESET, 0); - timeout = 300; - /* waiting for hardware to report that the stream is out of reset */ - do { - val = snd_hdac_stream_readb(azx_dev, SD_CTL) & - SD_CTL_STREAM_RESET; - if (!val) - break; - } while (--timeout); + /* wait for hardware to report that the stream is out of reset */ + snd_hdac_stream_readb_poll(azx_dev, SD_CTL, val, !(val & SD_CTL_STREAM_RESET), 3, 300); /* reset first position - may not be synced with hw at this time */ if (azx_dev->posbuf)