From patchwork Fri Nov 4 13:17:52 2022 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Maxime Ripard X-Patchwork-Id: 13032929 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from alsa0.perex.cz (alsa0.perex.cz [77.48.224.243]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id 94F97C4332F for ; Sat, 5 Nov 2022 07:14:33 +0000 (UTC) Received: from alsa1.perex.cz (alsa1.perex.cz [207.180.221.201]) (using TLSv1.2 with cipher AECDH-AES256-SHA (256/256 bits)) (No client certificate requested) by alsa0.perex.cz (Postfix) with ESMTPS id 42BD616EC; Sat, 5 Nov 2022 08:13:41 +0100 (CET) DKIM-Filter: OpenDKIM Filter v2.11.0 alsa0.perex.cz 42BD616EC DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=alsa-project.org; s=default; t=1667632471; bh=oLcWV9CzQns4W0opoCZuOaa+qIVFiYRAK6VcYTSKxa0=; h=From:Date:Subject:References:In-Reply-To:To:Cc:List-Id: List-Unsubscribe:List-Archive:List-Post:List-Help:List-Subscribe: From; b=gWzd8c82E4aFW/ZNnShZbgA4StoO0K7axJ5sBNwjyTLUUytlvueOfpD4m36DzogC+ PMJVJGc+BVpznjpCr5MV7T0k3CPpRTzB/fdNCNRSFQpzK53qkXyvvg3SK7G91IvilE o78hRlUWb7GSyUsgA6HvXY/FZdZApaOVGsuHhi+k= Received: from alsa1.perex.cz (localhost.localdomain [127.0.0.1]) by alsa1.perex.cz (Postfix) with ESMTP id 676A9F80675; Sat, 5 Nov 2022 08:04:04 +0100 (CET) Received: by alsa1.perex.cz (Postfix, from userid 50401) id 56209F804AC; Fri, 4 Nov 2022 14:33:07 +0100 (CET) Received: from new1-smtp.messagingengine.com (new1-smtp.messagingengine.com [66.111.4.221]) (using TLSv1.2 with cipher ADH-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by alsa1.perex.cz (Postfix) with ESMTPS id A9EA4F801D5 for ; Fri, 4 Nov 2022 14:32:59 +0100 (CET) DKIM-Filter: OpenDKIM Filter v2.11.0 alsa1.perex.cz A9EA4F801D5 Authentication-Results: alsa1.perex.cz; dkim=pass (2048-bit key) header.d=cerno.tech header.i=@cerno.tech header.b="uzIfcgd0"; dkim=pass (2048-bit key) header.d=messagingengine.com header.i=@messagingengine.com header.b="XBp5wfpi" Received: from compute1.internal (compute1.nyi.internal [10.202.2.41]) by mailnew.nyi.internal (Postfix) with ESMTP id E30EA580269; Fri, 4 Nov 2022 09:32:58 -0400 (EDT) Received: from mailfrontend2 ([10.202.2.163]) by compute1.internal (MEProxy); Fri, 04 Nov 2022 09:32:58 -0400 DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=cerno.tech; h=cc :cc:content-transfer-encoding:content-type:date:date:from:from :in-reply-to:in-reply-to:message-id:mime-version:references :reply-to:sender:subject:subject:to:to; s=fm3; t=1667568778; x= 1667575978; bh=vSt6U+MbOQyFoX22fbJ16ApKXjMQPIV6036d5Sbu8lg=; b=u zIfcgd0fzhiYhcqk3REFdxwgWHkKnqTvwBsZTvWnHmexsiJ8y9/bbXTIEyco9KLl dWHaCg+7OlUGn8lZzn/4w+0Vr8abhUkXoDneXyvOgpXOAcK6vNJv3e45a0Zs6V/M ZTQo3cfUHaKlg+13XDi1vr9PTy9DIke3y1wWX5mpGDqJrN72W0okbNGbKpN9PrSe Sby5FtnSNzQmDs54Ku/DnwgwvuvgU+6/FhGJlMUL1Od3I67H550ViBp0wBRfXSYG OAuXM0cQypqS7Iw3vkzUWVlOS5s7/smzZi+dQtftMKKLo1sGsuVg3IpxA3nxPkbK 5E2LzVgiNZeF7Rz3W2/nQ== DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d= messagingengine.com; h=cc:cc:content-transfer-encoding :content-type:date:date:feedback-id:feedback-id:from:from :in-reply-to:in-reply-to:message-id:mime-version:references :reply-to:sender:subject:subject:to:to:x-me-proxy:x-me-proxy :x-me-sender:x-me-sender:x-sasl-enc; s=fm3; t=1667568778; x= 1667575978; bh=vSt6U+MbOQyFoX22fbJ16ApKXjMQPIV6036d5Sbu8lg=; b=X Bp5wfpirXnmQpMGy6daSSL4kepWjvYrRGVyW85Hqpnm2iQZ/1rBJFFxyAur8KUma 6T82p2cEawZ1p9/R/YrscBbEZElvvhvrl3aq2FXxXEORsesUzkw0FuBtNzE1OckX 28sc5gF/p51JOg4tanlOlJP62+YRULv8z/48FpcQDt1kity4p05K3YrBIw1yq/VD cazm4jKBZX+MiyoZ5CgE2r3TBleOM4ke3OZhYgoSikmsDV6P6rERQx62dB3buoLr F8NjAFyh93tp6NdzkjDAJDHCRGcMEStpzcDpa/j4bnWZDgQx0W2tAjD6IFCvza3B I8JNy4tE8avG3L6wdQiWw== X-ME-Sender: X-ME-Received: X-ME-Proxy-Cause: gggruggvucftvghtrhhoucdtuddrgedvgedrvddugdehudcutefuodetggdotefrodftvf curfhrohhfihhlvgemucfhrghsthforghilhdpqfgfvfdpuffrtefokffrpgfnqfghnecu uegrihhlohhuthemuceftddtnecusecvtfgvtghiphhivghnthhsucdlqddutddtmdenuc fjughrpefhfffugggtgffkfhgjvfevofesthekredtredtjeenucfhrhhomhepofgrgihi mhgvucftihhprghrugcuoehmrgigihhmvgestggvrhhnohdrthgvtghhqeenucggtffrrg htthgvrhhnpeduudduhfevjeetfeegvdffvdevvdejudegudekjeehtdelhfffveethfej ledtveenucevlhhushhtvghrufhiiigvpedtnecurfgrrhgrmhepmhgrihhlfhhrohhmpe hmrgigihhmvgestggvrhhnohdrthgvtghh X-ME-Proxy: Feedback-ID: i8771445c:Fastmail Received: by mail.messagingengine.com (Postfix) with ESMTPA; Fri, 4 Nov 2022 09:32:57 -0400 (EDT) From: Maxime Ripard Date: Fri, 04 Nov 2022 14:17:52 +0100 Subject: [PATCH v2 35/65] clk: ux500: sysctrl: Add a determine_rate hook MIME-Version: 1.0 Message-Id: <20221018-clk-range-checks-fixes-v2-35-f6736dec138e@cerno.tech> References: <20221018-clk-range-checks-fixes-v2-0-f6736dec138e@cerno.tech> In-Reply-To: <20221018-clk-range-checks-fixes-v2-0-f6736dec138e@cerno.tech> To: =?unknown-8bit?q?Stephen_Boyd_=3Csboyd=40kernel=2Eorg=3E=2C?= =?unknown-8bit?q?_Maxime_Coquelin_=3Cmcoquelin=2Estm32=40gmail=2Ecom=3E=2C?= =?unknown-8bit?q?_Chen-Yu_Tsai_=3Cwens=40csie=2Eorg=3E=2C_Daniel_Vetter_=3Cd?= =?unknown-8bit?q?aniel=40ffwll=2Ech=3E=2C?= =?unknown-8bit?q?_Nicolas_Ferre_=3Cnicolas=2Eferre=40microchip=2Ecom=3E=2C?= =?unknown-8bit?q?_Thierry_Reding_=3Cthierry=2Ereding=40gmail=2Ecom=3E=2C?= =?unknown-8bit?q?_Jaroslav_Kysela_=3Cperex=40perex=2Ecz=3E=2C_Shawn_Guo_=3Cs?= =?unknown-8bit?q?hawnguo=40kernel=2Eorg=3E=2C?= =?unknown-8bit?q?_Fabio_Estevam_=3Cfestevam=40gmail=2Ecom=3E=2C_Ulf_Hansson_?= =?unknown-8bit?q?=3Culf=2Ehansson=40linaro=2Eorg=3E=2C?= =?unknown-8bit?q?_Claudiu_Beznea_=3Cclaudiu=2Ebeznea=40microchip=2Ecom=3E=2C?= =?unknown-8bit?q?_Michael_Turquette_=3Cmturquette=40baylibre=2Ecom=3E=2C?= =?unknown-8bit?q?_Dinh_Nguyen_=3Cdinguyen=40kernel=2Eorg=3E=2C_Paul_Cercueil?= =?unknown-8bit?q?_=3Cpaul=40crapouillou=2Enet=3E=2C?= =?unknown-8bit?q?_Chunyan_Zhang_=3Czhang=2Elyra=40gmail=2Ecom=3E=2C?= =?unknown-8bit?q?_Manivannan_Sadhasivam_=3Cmani=40kernel=2Eorg=3E=2C?= =?unknown-8bit?b?IEFuZHJlYXMgRsOkcmJlciA8YWZhZXJiZXJAc3VzZS5kZT4s?= =?unknown-8bit?q?_Jonathan_Hunter_=3Cjonathanh=40nvidia=2Ecom=3E=2C_Abel_Ves?= =?unknown-8bit?q?a_=3Cabelvesa=40kernel=2Eorg=3E=2C?= =?unknown-8bit?q?_Charles_Keepax_=3Cckeepax=40opensource=2Ecirrus=2Ecom=3E?= =?unknown-8bit?q?=2C?= =?unknown-8bit?q?_Alessandro_Zummo_=3Ca=2Ezummo=40towertech=2Eit=3E=2C?= =?unknown-8bit?q?_Peter_De_Schrijver_=3Cpdeschrijver=40nvidia=2Ecom=3E=2C?= =?unknown-8bit?q?_Orson_Zhai_=3Corsonzhai=40gmail=2Ecom=3E=2C?= =?unknown-8bit?q?_Alexandre_Torgue_=3Calexandre=2Etorgue=40foss=2Est=2Ecom?= =?unknown-8bit?q?=3E=2C?= =?unknown-8bit?q?_Prashant_Gaikwad_=3Cpgaikwad=40nvidia=2Ecom=3E=2C?= =?unknown-8bit?q?_Liam_Girdwood_=3Clgirdwood=40gmail=2Ecom=3E=2C?= =?unknown-8bit?q?_Alexandre_Belloni_=3Calexandre=2Ebelloni=40bootlin=2Ecom?= =?unknown-8bit?q?=3E=2C?= =?unknown-8bit?q?_Samuel_Holland_=3Csamuel=40sholland=2Eorg=3E=2C?= =?unknown-8bit?q?_Matthias_Brugger_=3Cmatthias=2Ebgg=40gmail=2Ecom=3E=2C?= =?unknown-8bit?q?_Richard_Fitzgerald_=3Crf=40opensource=2Ecirrus=2Ecom=3E=2C?= =?unknown-8bit?q?_Vinod_Koul_=3Cvkoul=40kernel=2Eorg=3E=2C_NXP_Linux_Team_?= =?unknown-8bit?q?=3Clinux-imx=40nxp=2Ecom=3E=2C?= =?unknown-8bit?q?_Sekhar_Nori_=3Cnsekhar=40ti=2Ecom=3E=2C_Kishon_Vijay_Abrah?= =?unknown-8bit?q?am_I_=3Ckishon=40kernel=2Eorg=3E=2C?= =?unknown-8bit?q?_Linus_Walleij_=3Clinus=2Ewalleij=40linaro=2Eorg=3E=2C_Taka?= =?unknown-8bit?q?shi_Iwai_=3Ctiwai=40suse=2Ecom=3E=2C?= =?unknown-8bit?q?_David_Airlie_=3Cairlied=40gmail=2Ecom=3E=2C?= =?unknown-8bit?q?_Luca_Ceresoli_=3Cluca=2Eceresoli=40bootlin=2Ecom=3E=2C?= =?unknown-8bit?q?_Jernej_Skrabec_=3Cjernej=2Eskrabec=40gmail=2Ecom=3E=2C?= =?unknown-8bit?q?_Pengutronix_Kernel_Team_=3Ckernel=40pengutronix=2Ede=3E=2C?= =?unknown-8bit?q?_Baolin_Wang_=3Cbaolin=2Ewang=40linux=2Ealibaba=2Ecom=3E=2C?= =?unknown-8bit?q?_David_Lechner_=3Cdavid=40lechnology=2Ecom=3E=2C?= =?unknown-8bit?q?_Sascha_Hauer_=3Cs=2Ehauer=40pengutronix=2Ede=3E=2C_Mark_Br?= =?unknown-8bit?q?own_=3Cbroonie=40kernel=2Eorg=3E=2C?= =?unknown-8bit?q?_Max_Filippov_=3Cjcmvbkbc=40gmail=2Ecom=3E=2C?= =?unknown-8bit?q?_Geert_Uytterhoeven_=3Cgeert+renesas=40glider=2Ebe=3E?= X-Mailer: b4 0.11.0-dev-99e3a X-Developer-Signature: v=1; a=openpgp-sha256; l=2421; i=maxime@cerno.tech; h=from:subject:message-id; bh=oLcWV9CzQns4W0opoCZuOaa+qIVFiYRAK6VcYTSKxa0=; b=owGbwMvMwCX2+D1vfrpE4FHG02pJDMmpAl9u/twoslN+xUUWw/RpwdYuB9RXfH5z6mKmksaf4+eO iW9b2VHKwiDGxSArpsgSI2y+JO7UrNedbHzzYOawMoEMYeDiFICJ7ElhZFj6jDUjUvFb2RarA5y5ve umhvY4qRqFvfgmc/Xs0RcTDacxMhyfE8b685fv4zchh+c/yLVn6FO9m7cg2TDIrV9gosnmH3wA X-Developer-Key: i=maxime@cerno.tech; a=openpgp; fpr=BE5675C37E818C8B5764241C254BCFC56BF6CE8D X-Mailman-Approved-At: Sat, 05 Nov 2022 08:03:31 +0100 Cc: linux-rtc@vger.kernel.org, alsa-devel@alsa-project.org, linux-kernel@vger.kernel.org, patches@opensource.cirrus.com, linux-actions@lists.infradead.org, linux-mips@vger.kernel.org, dri-devel@lists.freedesktop.org, linux-clk@vger.kernel.org, linux-renesas-soc@vger.kernel.org, linux-tegra@vger.kernel.org, linux-mediatek@lists.infradead.org, Maxime Ripard , linux-phy@lists.infradead.org, linux-sunxi@lists.linux.dev, linux-stm32@st-md-mailman.stormreply.com, linux-arm-kernel@lists.infradead.org, AngeloGioacchino Del Regno X-BeenThere: alsa-devel@alsa-project.org X-Mailman-Version: 2.1.15 Precedence: list List-Id: "Alsa-devel mailing list for ALSA developers - http://www.alsa-project.org" List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: alsa-devel-bounces@alsa-project.org Sender: "Alsa-devel" The UX500 sysctrl "set_parent" clocks implement a mux with a set_parent hook, but doesn't provide a determine_rate implementation. This is a bit odd, since set_parent() is there to, as its name implies, change the parent of a clock. However, the most likely candidate to trigger that parent change is a call to clk_set_rate(), with determine_rate() figuring out which parent is the best suited for a given rate. The other trigger would be a call to clk_set_parent(), but it's far less used, and it doesn't look like there's any obvious user for that clock. So, the set_parent hook is effectively unused, possibly because of an oversight. However, it could also be an explicit decision by the original author to avoid any reparenting but through an explicit call to clk_set_parent(). The latter case would be equivalent to setting the flag CLK_SET_RATE_NO_REPARENT, together with setting our determine_rate hook to __clk_mux_determine_rate(). Indeed, if no determine_rate implementation is provided, clk_round_rate() (through clk_core_round_rate_nolock()) will call itself on the parent if CLK_SET_RATE_PARENT is set, and will not change the clock rate otherwise. __clk_mux_determine_rate() has the exact same behavior when CLK_SET_RATE_NO_REPARENT is set. And if it was an oversight, then we are at least explicit about our behavior now and it can be further refined down the line. Signed-off-by: Maxime Ripard Acked-by: Linus Walleij Reviewed-by: Ulf Hansson --- drivers/clk/ux500/clk-sysctrl.c | 4 +++- 1 file changed, 3 insertions(+), 1 deletion(-) diff --git a/drivers/clk/ux500/clk-sysctrl.c b/drivers/clk/ux500/clk-sysctrl.c index 702f2f8b43fa..d36336665b6d 100644 --- a/drivers/clk/ux500/clk-sysctrl.c +++ b/drivers/clk/ux500/clk-sysctrl.c @@ -110,6 +110,7 @@ static const struct clk_ops clk_sysctrl_gate_fixed_rate_ops = { }; static const struct clk_ops clk_sysctrl_set_parent_ops = { + .determine_rate = __clk_mux_determine_rate, .set_parent = clk_sysctrl_set_parent, .get_parent = clk_sysctrl_get_parent, }; @@ -220,6 +221,7 @@ struct clk *clk_reg_sysctrl_set_parent(struct device *dev, unsigned long flags) { return clk_reg_sysctrl(dev, name, parent_names, num_parents, - reg_sel, reg_mask, reg_bits, 0, 0, flags, + reg_sel, reg_mask, reg_bits, 0, 0, + flags | CLK_SET_RATE_NO_REPARENT, &clk_sysctrl_set_parent_ops); }