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Tue, 4 Apr 2023 08:45:09 -0400 (EDT) From: Maxime Ripard Date: Tue, 04 Apr 2023 12:11:23 +0200 Subject: [PATCH v3 33/65] clk: tegra: periph: Add a determine_rate hook MIME-Version: 1.0 Message-Id: <20221018-clk-range-checks-fixes-v3-33-9a1358472d52@cerno.tech> References: <20221018-clk-range-checks-fixes-v3-0-9a1358472d52@cerno.tech> In-Reply-To: <20221018-clk-range-checks-fixes-v3-0-9a1358472d52@cerno.tech> To: Michael Turquette , Stephen Boyd , =?utf-8?q?Andreas_F=C3=A4rber?= , Manivannan Sadhasivam , Nicolas Ferre , Alexandre Belloni , Claudiu Beznea , Max Filippov , Charles Keepax , Richard Fitzgerald , Maxime Coquelin , Alexandre Torgue , Luca Ceresoli , David Lechner , Sekhar Nori , Abel Vesa , Shawn Guo , Sascha Hauer , Pengutronix Kernel Team , Fabio Estevam , NXP Linux Team , Matthias Brugger , Geert Uytterhoeven , Dinh Nguyen , Peter De Schrijver , Prashant Gaikwad , Thierry Reding , Jonathan Hunter , Ulf Hansson , Linus Walleij , David Airlie , Daniel Vetter , Vinod Koul , Kishon Vijay Abraham I , Alessandro Zummo , Chen-Yu Tsai , Jernej Skrabec , Samuel Holland , Liam Girdwood , Mark Brown , Jaroslav Kysela , Takashi Iwai , Paul Cercueil , Orson Zhai , Baolin Wang , Chunyan Zhang X-Mailer: b4 0.12.1 X-Developer-Signature: v=1; a=openpgp-sha256; l=2509; i=maxime@cerno.tech; h=from:subject:message-id; bh=CVkVploTBmGsGDh1pgQkRdhTnIRCmgkdPTUL6cHj8pk=; b=owGbwMvMwCX2+D1vfrpE4FHG02pJDCna37e9izlhYt3DnT9rm3BnR1Xgnvq3K3/OOOCo88M9ZOHO 6cJsHaUsDGJcDLJiiiwxwuZL4k7Net3JxjcPZg4rE8gQBi5OAZiIJxsjw8+dV8/9SFrb+OHbE+Wa2l evFv3XC3k/N3bRJLV/vc1eRqIM/+tqpl/U3NSULVmx9/if9efKDrzzZdBm89t9XvnEW1OdJF4A X-Developer-Key: i=maxime@cerno.tech; a=openpgp; fpr=BE5675C37E818C8B5764241C254BCFC56BF6CE8D X-MailFrom: maxime@cerno.tech X-Mailman-Rule-Hits: max-recipients X-Mailman-Rule-Misses: dmarc-mitigation; no-senders; approved; emergency; loop; banned-address; member-moderation; header-match-alsa-devel.alsa-project.org-0; header-match-alsa-devel.alsa-project.org-1; nonmember-moderation; administrivia; implicit-dest; max-size; news-moderation; no-subject; digests; suspicious-header Message-ID-Hash: CVM4UKVQDWZSBBHNIGNQDGPZAF6PLW2N X-Message-ID-Hash: CVM4UKVQDWZSBBHNIGNQDGPZAF6PLW2N X-Mailman-Approved-At: Wed, 05 Apr 2023 07:18:22 +0000 CC: linux-clk@vger.kernel.org, linux-kernel@vger.kernel.org, AngeloGioacchino Del Regno , linux-arm-kernel@lists.infradead.org, linux-actions@lists.infradead.org, patches@opensource.cirrus.com, linux-stm32@st-md-mailman.stormreply.com, linux-mediatek@lists.infradead.org, linux-renesas-soc@vger.kernel.org, linux-tegra@vger.kernel.org, dri-devel@lists.freedesktop.org, linux-phy@lists.infradead.org, linux-rtc@vger.kernel.org, linux-sunxi@lists.linux.dev, alsa-devel@alsa-project.org, linux-mips@vger.kernel.org, Maxime Ripard X-Mailman-Version: 3.3.8 Precedence: list List-Id: "Alsa-devel mailing list for ALSA developers - http://www.alsa-project.org" Archived-At: List-Archive: List-Help: List-Owner: List-Post: List-Subscribe: List-Unsubscribe: The Tegra periph nodiv clock implements a mux with a set_parent hook, but doesn't provide a determine_rate implementation. This is a bit odd, since set_parent() is there to, as its name implies, change the parent of a clock. However, the most likely candidate to trigger that parent change is a call to clk_set_rate(), with determine_rate() figuring out which parent is the best suited for a given rate. The other trigger would be a call to clk_set_parent(), but it's far less used, and it doesn't look like there's any obvious user for that clock. So, the set_parent hook is effectively unused, possibly because of an oversight. However, it could also be an explicit decision by the original author to avoid any reparenting but through an explicit call to clk_set_parent(). The latter case would be equivalent to setting the flag CLK_SET_RATE_NO_REPARENT, together with setting our determine_rate hook to __clk_mux_determine_rate(). Indeed, if no determine_rate implementation is provided, clk_round_rate() (through clk_core_round_rate_nolock()) will call itself on the parent if CLK_SET_RATE_PARENT is set, and will not change the clock rate otherwise. __clk_mux_determine_rate() has the exact same behavior when CLK_SET_RATE_NO_REPARENT is set. And if it was an oversight, then we are at least explicit about our behavior now and it can be further refined down the line. Signed-off-by: Maxime Ripard --- drivers/clk/tegra/clk-periph.c | 3 ++- 1 file changed, 2 insertions(+), 1 deletion(-) diff --git a/drivers/clk/tegra/clk-periph.c b/drivers/clk/tegra/clk-periph.c index 79ca3aa072b7..367396c62259 100644 --- a/drivers/clk/tegra/clk-periph.c +++ b/drivers/clk/tegra/clk-periph.c @@ -140,6 +140,7 @@ const struct clk_ops tegra_clk_periph_ops = { }; static const struct clk_ops tegra_clk_periph_nodiv_ops = { + .determine_rate = __clk_mux_determine_rate, .get_parent = clk_periph_get_parent, .set_parent = clk_periph_set_parent, .is_enabled = clk_periph_is_enabled, @@ -170,7 +171,7 @@ static struct clk *_tegra_clk_register_periph(const char *name, bool div = !(periph->gate.flags & TEGRA_PERIPH_NO_DIV); if (periph->gate.flags & TEGRA_PERIPH_NO_DIV) { - flags |= CLK_SET_RATE_PARENT; + flags |= CLK_SET_RATE_PARENT | CLK_SET_RATE_NO_REPARENT; init.ops = &tegra_clk_periph_nodiv_ops; } else if (periph->gate.flags & TEGRA_PERIPH_NO_GATE) init.ops = &tegra_clk_periph_no_gate_ops;