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Fri, 17 Feb 2023 10:14:13 -0600 Received: from ediex01.ad.cirrus.com (198.61.84.80) by ediex01.ad.cirrus.com (198.61.84.80) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id 15.2.1118.21; Fri, 17 Feb 2023 10:14:10 -0600 Received: from ediswmail.ad.cirrus.com (198.61.86.93) by ediex01.ad.cirrus.com (198.61.84.80) with Microsoft SMTP Server id 15.2.1118.21 via Frontend Transport; Fri, 17 Feb 2023 10:14:10 -0600 Received: from edi-sw-dsktp-006.ad.cirrus.com (edi-sw-dsktp-006.ad.cirrus.com [198.90.251.127]) by ediswmail.ad.cirrus.com (Postfix) with ESMTP id DE46745; Fri, 17 Feb 2023 16:14:10 +0000 (UTC) From: Richard Fitzgerald To: , , , , , Subject: [PATCH 10/10] ASoC: Intel: soc-acpi: Add CS35L56 Soundwire to TGL Date: Fri, 17 Feb 2023 16:14:10 +0000 Message-ID: <20230217161410.915202-11-rf@opensource.cirrus.com> X-Mailer: git-send-email 2.30.2 In-Reply-To: <20230217161410.915202-1-rf@opensource.cirrus.com> References: <20230217161410.915202-1-rf@opensource.cirrus.com> MIME-Version: 1.0 X-Proofpoint-GUID: mqzk6flip_3wcJ6k9Ft6Lz4HKUzCdVT6 X-Proofpoint-ORIG-GUID: mqzk6flip_3wcJ6k9Ft6Lz4HKUzCdVT6 X-Proofpoint-Spam-Reason: safe Message-ID-Hash: EAS3JNHUWQTC3HGG35ZEIBRY6RQ7FG3V X-Message-ID-Hash: EAS3JNHUWQTC3HGG35ZEIBRY6RQ7FG3V X-MailFrom: prvs=74127981b7=rf@opensource.cirrus.com X-Mailman-Rule-Misses: dmarc-mitigation; no-senders; approved; emergency; loop; banned-address; member-moderation; header-match-alsa-devel.alsa-project.org-0; header-match-alsa-devel.alsa-project.org-1; nonmember-moderation; administrivia; implicit-dest; max-recipients; max-size; news-moderation; no-subject; digests; suspicious-header CC: alsa-devel@alsa-project.org, linux-kernel@vger.kernel.org, patches@opensource.cirrus.com, Richard Fitzgerald X-Mailman-Version: 3.3.8 Precedence: list List-Id: "Alsa-devel mailing list for ALSA developers - http://www.alsa-project.org" Archived-At: List-Archive: List-Help: List-Owner: List-Post: List-Subscribe: List-Unsubscribe: This adds match entries for one or four CS35L56 on SDW0. Signed-off-by: Richard Fitzgerald --- .../intel/common/soc-acpi-intel-tgl-match.c | 57 +++++++++++++++++++ 1 file changed, 57 insertions(+) diff --git a/sound/soc/intel/common/soc-acpi-intel-tgl-match.c b/sound/soc/intel/common/soc-acpi-intel-tgl-match.c index ef19150e7b2e..dae76c96d9fe 100644 --- a/sound/soc/intel/common/soc-acpi-intel-tgl-match.c +++ b/sound/soc/intel/common/soc-acpi-intel-tgl-match.c @@ -414,6 +414,51 @@ struct snd_soc_acpi_mach snd_soc_acpi_intel_tgl_machines[] = { }; EXPORT_SYMBOL_GPL(snd_soc_acpi_intel_tgl_machines); +static const struct snd_soc_acpi_adr_device cs35l56_sdw0_adr[] = { + { + .adr = 0x00003001fa355601, + .num_endpoints = 1, + .endpoints = &single_endpoint, + .name_prefix = "AMP1" + }, + { + .adr = 0x00003101fa355601, + .num_endpoints = 1, + .endpoints = &single_endpoint, + .name_prefix = "AMP2" + }, + { + .adr = 0x00003201fa355601, + .num_endpoints = 1, + .endpoints = &single_endpoint, + .name_prefix = "AMP3" + }, + { + .adr = 0x00003301fa355601, + .num_endpoints = 1, + .endpoints = &single_endpoint, + .name_prefix = "AMP4" + }, +}; + +static const struct snd_soc_acpi_link_adr up_extreme_cs35l56_sdw0_one[] = { + { + .mask = BIT(0), + .num_adr = 1, + .adr_d = cs35l56_sdw0_adr, + }, + {} +}; + +static const struct snd_soc_acpi_link_adr up_extreme_cs35l56_sdw0_four[] = { + { + .mask = BIT(0), + .num_adr = 4, + .adr_d = cs35l56_sdw0_adr, + }, + {} +}; + /* this table is used when there is no I2S codec present */ struct snd_soc_acpi_mach snd_soc_acpi_intel_tgl_sdw_machines[] = { /* mockup tests need to be first */ @@ -501,6 +546,18 @@ struct snd_soc_acpi_mach snd_soc_acpi_intel_tgl_sdw_machines[] = { .drv_name = "sof_sdw", .sof_tplg_filename = "sof-tgl-rt711.tplg", }, + { + .link_mask = BIT(0), + .links = up_extreme_cs35l56_sdw0_four, + .drv_name = "sof_sdw", + .sof_tplg_filename = "sof-tgl-cs35l56-sdw0.tplg" + }, + { + .link_mask = BIT(0), + .links = up_extreme_cs35l56_sdw0_one, + .drv_name = "sof_sdw", + .sof_tplg_filename = "sof-tgl-cs35l56-sdw0.tplg" + }, {}, }; EXPORT_SYMBOL_GPL(snd_soc_acpi_intel_tgl_sdw_machines);