diff mbox series

[v2,2/7] ASoC: mediatek: mt7986: support audio clock control

Message ID 20230626023501.11120-3-maso.huang@mediatek.com (mailing list archive)
State New, archived
Headers show
Series ASoC: mediatek: Add support for MT7986 SoC | expand

Commit Message

Maso Huang (黃加竹) June 26, 2023, 2:34 a.m. UTC 
Add audio clock wrapper and audio tuner control.

Signed-off-by: Maso Huang <maso.huang@mediatek.com>
---
 sound/soc/mediatek/mt7986/mt7986-afe-clk.c | 75 ++++++++++++++++++++++
 sound/soc/mediatek/mt7986/mt7986-afe-clk.h | 18 ++++++
 2 files changed, 93 insertions(+)
 create mode 100644 sound/soc/mediatek/mt7986/mt7986-afe-clk.c
 create mode 100644 sound/soc/mediatek/mt7986/mt7986-afe-clk.h

Comments

Claudiu Beznea June 27, 2023, 4:37 a.m. UTC | #1 
On 26.06.2023 05:34, Maso Huang wrote:
> EXTERNAL EMAIL: Do not click links or open attachments unless you know the content is safe
> 
> Add audio clock wrapper and audio tuner control.
> 
> Signed-off-by: Maso Huang <maso.huang@mediatek.com>

Reviewed-by: Claudiu Beznea <claudiu.beznea@microchip.com>


> ---
>  sound/soc/mediatek/mt7986/mt7986-afe-clk.c | 75 ++++++++++++++++++++++
>  sound/soc/mediatek/mt7986/mt7986-afe-clk.h | 18 ++++++
>  2 files changed, 93 insertions(+)
>  create mode 100644 sound/soc/mediatek/mt7986/mt7986-afe-clk.c
>  create mode 100644 sound/soc/mediatek/mt7986/mt7986-afe-clk.h
> 
> diff --git a/sound/soc/mediatek/mt7986/mt7986-afe-clk.c b/sound/soc/mediatek/mt7986/mt7986-afe-clk.c
> new file mode 100644
> index 000000000000..a8b5fae05673
> --- /dev/null
> +++ b/sound/soc/mediatek/mt7986/mt7986-afe-clk.c
> @@ -0,0 +1,75 @@
> +// SPDX-License-Identifier: GPL-2.0
> +/*
> + * mt7986-afe-clk.c  --  MediaTek 7986 afe clock ctrl
> + *
> + * Copyright (c) 2021 MediaTek Inc.
> + * Author: Vic Wu <vic.wu@mediatek.com>
> + *         Maso Huang <maso.huang@mediatek.com>
> + */
> +
> +#include <linux/clk.h>
> +
> +#include "mt7986-afe-common.h"
> +#include "mt7986-afe-clk.h"
> +#include "mt7986-reg.h"
> +
> +enum {
> +       CK_INFRA_AUD_BUS_CK = 0,
> +       CK_INFRA_AUD_26M_CK,
> +       CK_INFRA_AUD_L_CK,
> +       CK_INFRA_AUD_AUD_CK,
> +       CK_INFRA_AUD_EG2_CK,
> +       CLK_NUM
> +};
> +
> +static const char *aud_clks[CLK_NUM] = {
> +       [CK_INFRA_AUD_BUS_CK] = "aud_bus_ck",
> +       [CK_INFRA_AUD_26M_CK] = "aud_26m_ck",
> +       [CK_INFRA_AUD_L_CK] = "aud_l_ck",
> +       [CK_INFRA_AUD_AUD_CK] = "aud_aud_ck",
> +       [CK_INFRA_AUD_EG2_CK] = "aud_eg2_ck",
> +};
> +
> +int mt7986_init_clock(struct mtk_base_afe *afe)
> +{
> +       struct mt7986_afe_private *afe_priv = afe->platform_priv;
> +       int ret, i;
> +
> +       afe_priv->clks = devm_kcalloc(afe->dev, CLK_NUM,
> +                               sizeof(*afe_priv->clks), GFP_KERNEL);
> +       if (!afe_priv->clks)
> +               return -ENOMEM;
> +       afe_priv->num_clks = CLK_NUM;
> +
> +       for (i = 0; i < afe_priv->num_clks; i++)
> +               afe_priv->clks[i].id = aud_clks[i];
> +
> +       ret = devm_clk_bulk_get(afe->dev, afe_priv->num_clks, afe_priv->clks);
> +       if (ret)
> +               return dev_err_probe(afe->dev, ret, "Failed to get clocks\n");
> +
> +       return 0;
> +}
> +
> +int mt7986_afe_enable_clock(struct mtk_base_afe *afe)
> +{
> +       struct mt7986_afe_private *afe_priv = afe->platform_priv;
> +       int ret;
> +
> +       ret = clk_bulk_prepare_enable(afe_priv->num_clks, afe_priv->clks);
> +       if (ret)
> +               return dev_err_probe(afe->dev, ret, "Failed to enable clocks\n");
> +
> +       return 0;
> +}
> +EXPORT_SYMBOL_GPL(mt7986_afe_enable_clock);
> +
> +int mt7986_afe_disable_clock(struct mtk_base_afe *afe)
> +{
> +       struct mt7986_afe_private *afe_priv = afe->platform_priv;
> +
> +       clk_bulk_disable_unprepare(afe_priv->num_clks, afe_priv->clks);
> +
> +       return 0;
> +}
> +EXPORT_SYMBOL_GPL(mt7986_afe_disable_clock);
> diff --git a/sound/soc/mediatek/mt7986/mt7986-afe-clk.h b/sound/soc/mediatek/mt7986/mt7986-afe-clk.h
> new file mode 100644
> index 000000000000..2f15b7a54bdc
> --- /dev/null
> +++ b/sound/soc/mediatek/mt7986/mt7986-afe-clk.h
> @@ -0,0 +1,18 @@
> +/* SPDX-License-Identifier: GPL-2.0 */
> +/*
> + * mt7986-afe-clk.h  --  MediaTek 7986 afe clock ctrl definition
> + *
> + * Copyright (c) 2021 MediaTek Inc.
> + * Author: Vic Wu <vic.wu@mediatek.com>
> + *         Maso Huang <maso.huang@mediatek.com>
> + */
> +
> +#ifndef _MT7986_AFE_CLK_H_
> +#define _MT7986_AFE_CLK_H_
> +
> +struct mtk_base_afe;
> +
> +int mt7986_init_clock(struct mtk_base_afe *afe);
> +int mt7986_afe_enable_clock(struct mtk_base_afe *afe);
> +int mt7986_afe_disable_clock(struct mtk_base_afe *afe);
> +#endif
> --
> 2.18.0
> 
> 
> _______________________________________________
> linux-arm-kernel mailing list
> linux-arm-kernel@lists.infradead.org
> http://lists.infradead.org/mailman/listinfo/linux-arm-kernel
AngeloGioacchino Del Regno July 4, 2023, 8:53 a.m. UTC | #2 
Il 26/06/23 04:34, Maso Huang ha scritto:
> Add audio clock wrapper and audio tuner control.
> 
> Signed-off-by: Maso Huang <maso.huang@mediatek.com>
> ---
>   sound/soc/mediatek/mt7986/mt7986-afe-clk.c | 75 ++++++++++++++++++++++
>   sound/soc/mediatek/mt7986/mt7986-afe-clk.h | 18 ++++++
>   2 files changed, 93 insertions(+)
>   create mode 100644 sound/soc/mediatek/mt7986/mt7986-afe-clk.c
>   create mode 100644 sound/soc/mediatek/mt7986/mt7986-afe-clk.h
> 
> diff --git a/sound/soc/mediatek/mt7986/mt7986-afe-clk.c b/sound/soc/mediatek/mt7986/mt7986-afe-clk.c
> new file mode 100644
> index 000000000000..a8b5fae05673
> --- /dev/null
> +++ b/sound/soc/mediatek/mt7986/mt7986-afe-clk.c
> @@ -0,0 +1,75 @@
> +// SPDX-License-Identifier: GPL-2.0
> +/*
> + * mt7986-afe-clk.c  --  MediaTek 7986 afe clock ctrl
> + *
> + * Copyright (c) 2021 MediaTek Inc.
> + * Author: Vic Wu <vic.wu@mediatek.com>
> + *         Maso Huang <maso.huang@mediatek.com>
> + */
> +
> +#include <linux/clk.h>
> +
> +#include "mt7986-afe-common.h"
> +#include "mt7986-afe-clk.h"
> +#include "mt7986-reg.h"
> +
> +enum {
> +	CK_INFRA_AUD_BUS_CK = 0,
> +	CK_INFRA_AUD_26M_CK,
> +	CK_INFRA_AUD_L_CK,
> +	CK_INFRA_AUD_AUD_CK,
> +	CK_INFRA_AUD_EG2_CK,
> +	CLK_NUM
> +};
> +
> +static const char *aud_clks[CLK_NUM] = {
> +	[CK_INFRA_AUD_BUS_CK] = "aud_bus_ck",
> +	[CK_INFRA_AUD_26M_CK] = "aud_26m_ck",
> +	[CK_INFRA_AUD_L_CK] = "aud_l_ck",
> +	[CK_INFRA_AUD_AUD_CK] = "aud_aud_ck",
> +	[CK_INFRA_AUD_EG2_CK] = "aud_eg2_ck",
> +};
> +
> +int mt7986_init_clock(struct mtk_base_afe *afe)
> +{
> +	struct mt7986_afe_private *afe_priv = afe->platform_priv;
> +	int ret, i;
> +
> +	afe_priv->clks = devm_kcalloc(afe->dev, CLK_NUM,
> +				sizeof(*afe_priv->clks), GFP_KERNEL);
> +	if (!afe_priv->clks)
> +		return -ENOMEM;
> +	afe_priv->num_clks = CLK_NUM;
> +
> +	for (i = 0; i < afe_priv->num_clks; i++)
> +		afe_priv->clks[i].id = aud_clks[i];
> +
> +	ret = devm_clk_bulk_get(afe->dev, afe_priv->num_clks, afe_priv->clks);
> +	if (ret)
> +		return dev_err_probe(afe->dev, ret, "Failed to get clocks\n");
> +
> +	return 0;
> +}
> +
> +int mt7986_afe_enable_clock(struct mtk_base_afe *afe)
> +{
> +	struct mt7986_afe_private *afe_priv = afe->platform_priv;
> +	int ret;
> +
> +	ret = clk_bulk_prepare_enable(afe_priv->num_clks, afe_priv->clks);

You don't need a wrapper function for just a single clk_bulk_prepare_enable() call.

> +	if (ret)
> +		return dev_err_probe(afe->dev, ret, "Failed to enable clocks\n");
> +
> +	return 0;
> +}
> +EXPORT_SYMBOL_GPL(mt7986_afe_enable_clock);
> +
> +int mt7986_afe_disable_clock(struct mtk_base_afe *afe)
> +{
> +	struct mt7986_afe_private *afe_priv = afe->platform_priv;
> +
> +	clk_bulk_disable_unprepare(afe_priv->num_clks, afe_priv->clks);

Same for this one....

... which means that this file will have only mt7986_init_clock() so, ultimately,
you don't need a mt7986-afe-clk.c file at all.
Please merge this logic into mt7986-afe-pcm.c, which is also the only user of it.

Thanks,
Angelo
diff mbox series

Patch

diff --git a/sound/soc/mediatek/mt7986/mt7986-afe-clk.c b/sound/soc/mediatek/mt7986/mt7986-afe-clk.c
new file mode 100644
index 000000000000..a8b5fae05673
--- /dev/null
+++ b/sound/soc/mediatek/mt7986/mt7986-afe-clk.c
@@ -0,0 +1,75 @@ 
+// SPDX-License-Identifier: GPL-2.0
+/*
+ * mt7986-afe-clk.c  --  MediaTek 7986 afe clock ctrl
+ *
+ * Copyright (c) 2021 MediaTek Inc.
+ * Author: Vic Wu <vic.wu@mediatek.com>
+ *         Maso Huang <maso.huang@mediatek.com>
+ */
+
+#include <linux/clk.h>
+
+#include "mt7986-afe-common.h"
+#include "mt7986-afe-clk.h"
+#include "mt7986-reg.h"
+
+enum {
+	CK_INFRA_AUD_BUS_CK = 0,
+	CK_INFRA_AUD_26M_CK,
+	CK_INFRA_AUD_L_CK,
+	CK_INFRA_AUD_AUD_CK,
+	CK_INFRA_AUD_EG2_CK,
+	CLK_NUM
+};
+
+static const char *aud_clks[CLK_NUM] = {
+	[CK_INFRA_AUD_BUS_CK] = "aud_bus_ck",
+	[CK_INFRA_AUD_26M_CK] = "aud_26m_ck",
+	[CK_INFRA_AUD_L_CK] = "aud_l_ck",
+	[CK_INFRA_AUD_AUD_CK] = "aud_aud_ck",
+	[CK_INFRA_AUD_EG2_CK] = "aud_eg2_ck",
+};
+
+int mt7986_init_clock(struct mtk_base_afe *afe)
+{
+	struct mt7986_afe_private *afe_priv = afe->platform_priv;
+	int ret, i;
+
+	afe_priv->clks = devm_kcalloc(afe->dev, CLK_NUM,
+				sizeof(*afe_priv->clks), GFP_KERNEL);
+	if (!afe_priv->clks)
+		return -ENOMEM;
+	afe_priv->num_clks = CLK_NUM;
+
+	for (i = 0; i < afe_priv->num_clks; i++)
+		afe_priv->clks[i].id = aud_clks[i];
+
+	ret = devm_clk_bulk_get(afe->dev, afe_priv->num_clks, afe_priv->clks);
+	if (ret)
+		return dev_err_probe(afe->dev, ret, "Failed to get clocks\n");
+
+	return 0;
+}
+
+int mt7986_afe_enable_clock(struct mtk_base_afe *afe)
+{
+	struct mt7986_afe_private *afe_priv = afe->platform_priv;
+	int ret;
+
+	ret = clk_bulk_prepare_enable(afe_priv->num_clks, afe_priv->clks);
+	if (ret)
+		return dev_err_probe(afe->dev, ret, "Failed to enable clocks\n");
+
+	return 0;
+}
+EXPORT_SYMBOL_GPL(mt7986_afe_enable_clock);
+
+int mt7986_afe_disable_clock(struct mtk_base_afe *afe)
+{
+	struct mt7986_afe_private *afe_priv = afe->platform_priv;
+
+	clk_bulk_disable_unprepare(afe_priv->num_clks, afe_priv->clks);
+
+	return 0;
+}
+EXPORT_SYMBOL_GPL(mt7986_afe_disable_clock);
diff --git a/sound/soc/mediatek/mt7986/mt7986-afe-clk.h b/sound/soc/mediatek/mt7986/mt7986-afe-clk.h
new file mode 100644
index 000000000000..2f15b7a54bdc
--- /dev/null
+++ b/sound/soc/mediatek/mt7986/mt7986-afe-clk.h
@@ -0,0 +1,18 @@ 
+/* SPDX-License-Identifier: GPL-2.0 */
+/*
+ * mt7986-afe-clk.h  --  MediaTek 7986 afe clock ctrl definition
+ *
+ * Copyright (c) 2021 MediaTek Inc.
+ * Author: Vic Wu <vic.wu@mediatek.com>
+ *         Maso Huang <maso.huang@mediatek.com>
+ */
+
+#ifndef _MT7986_AFE_CLK_H_
+#define _MT7986_AFE_CLK_H_
+
+struct mtk_base_afe;
+
+int mt7986_init_clock(struct mtk_base_afe *afe);
+int mt7986_afe_enable_clock(struct mtk_base_afe *afe);
+int mt7986_afe_disable_clock(struct mtk_base_afe *afe);
+#endif