| Message ID | 20230821144151.207339-5-xingyu.wu@starfivetech.com (mailing list archive) |
|---|---|
| State | New, archived |
| Headers | show |
| Series | Add I2S support for the StarFive JH7110 SoC | expand |
On 2023/8/21 22:41, Xingyu Wu wrote: > These pins are actually I2STX1 clock input, not I2STX0, > so their names should be changed. > > Signed-off-by: Xingyu Wu <xingyu.wu@starfivetech.com> > --- > arch/riscv/boot/dts/starfive/jh7110-pinfunc.h | 4 ++-- > 1 file changed, 2 insertions(+), 2 deletions(-) > > diff --git a/arch/riscv/boot/dts/starfive/jh7110-pinfunc.h b/arch/riscv/boot/dts/starfive/jh7110-pinfunc.h > index fb0139b56723..256de17f5261 100644 > --- a/arch/riscv/boot/dts/starfive/jh7110-pinfunc.h > +++ b/arch/riscv/boot/dts/starfive/jh7110-pinfunc.h > @@ -240,8 +240,8 @@ > #define GPI_SYS_MCLK_EXT 30 > #define GPI_SYS_I2SRX_BCLK 31 > #define GPI_SYS_I2SRX_LRCK 32 > -#define GPI_SYS_I2STX0_BCLK 33 > -#define GPI_SYS_I2STX0_LRCK 34 > +#define GPI_SYS_I2STX1_BCLK 33 > +#define GPI_SYS_I2STX1_LRCK 34 > #define GPI_SYS_TDM_CLK 35 > #define GPI_SYS_TDM_RXD 36 > #define GPI_SYS_TDM_SYNC 37 Reviewed-by: Walker Chen <walker.chen@starfivetech.com> Thanks!
diff --git a/arch/riscv/boot/dts/starfive/jh7110-pinfunc.h b/arch/riscv/boot/dts/starfive/jh7110-pinfunc.h index fb0139b56723..256de17f5261 100644 --- a/arch/riscv/boot/dts/starfive/jh7110-pinfunc.h +++ b/arch/riscv/boot/dts/starfive/jh7110-pinfunc.h @@ -240,8 +240,8 @@ #define GPI_SYS_MCLK_EXT 30 #define GPI_SYS_I2SRX_BCLK 31 #define GPI_SYS_I2SRX_LRCK 32 -#define GPI_SYS_I2STX0_BCLK 33 -#define GPI_SYS_I2STX0_LRCK 34 +#define GPI_SYS_I2STX1_BCLK 33 +#define GPI_SYS_I2STX1_LRCK 34 #define GPI_SYS_TDM_CLK 35 #define GPI_SYS_TDM_RXD 36 #define GPI_SYS_TDM_SYNC 37
These pins are actually I2STX1 clock input, not I2STX0, so their names should be changed. Signed-off-by: Xingyu Wu <xingyu.wu@starfivetech.com> --- arch/riscv/boot/dts/starfive/jh7110-pinfunc.h | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-)