diff mbox series

[v1,1/3] ASoC: cs42l42: Ensure a reset pulse meets minimum pulse width.

Message ID 20230913150012.604775-2-sbinding@opensource.cirrus.com (mailing list archive)
State Accepted
Commit 41dac81b56c82c51a6d00fda5f3af7691ffee2d7
Headers show
Series ASoC: cs42l42: Fix handling of hard reset | expand

Commit Message

Stefan Binding Sept. 13, 2023, 3 p.m. UTC 
From: Richard Fitzgerald <rf@opensource.cirrus.com>

The CS42L42 can accept very short reset pulses of a few microseconds
but there's no reason to force a very short pulse.
Allow a wide range for the usleep_range() so it can be relaxed about
the choice of timing source.

Signed-off-by: Richard Fitzgerald <rf@opensource.cirrus.com>
Signed-off-by: Stefan Binding <sbinding@opensource.cirrus.com>
---
 sound/soc/codecs/cs42l42.c | 4 ++++
 1 file changed, 4 insertions(+)
diff mbox series

Patch

diff --git a/sound/soc/codecs/cs42l42.c b/sound/soc/codecs/cs42l42.c
index a0de0329406a..56d2857a4f01 100644
--- a/sound/soc/codecs/cs42l42.c
+++ b/sound/soc/codecs/cs42l42.c
@@ -2320,6 +2320,10 @@  int cs42l42_common_probe(struct cs42l42_private *cs42l42,
 
 	if (cs42l42->reset_gpio) {
 		dev_dbg(cs42l42->dev, "Found reset GPIO\n");
+
+		/* Ensure minimum reset pulse width */
+		usleep_range(10, 500);
+
 		gpiod_set_value_cansleep(cs42l42->reset_gpio, 1);
 	}
 	usleep_range(CS42L42_BOOT_TIME_US, CS42L42_BOOT_TIME_US * 2);