| Message ID | 20231221033223.73201-2-xingyu.wu@starfivetech.com (mailing list archive) |
|---|---|
| State | New, archived |
| Headers | show |
| Series | Add Cadence I2S controller driver for the | expand |
Xingyu, Mark, On Thu, Dec 21, 2023 at 11:32:22AM +0800, Xingyu Wu wrote: > Add bindings for the Multi-Channel I2S controller of Cadence > on the StarFive JH8100 SoC. > > Signed-off-by: Xingyu Wu <xingyu.wu@starfivetech.com> > --- > .../bindings/sound/cdns,jh8100-i2s.yaml | 100 ++++++++++++++++++ > 1 file changed, 100 insertions(+) > create mode 100644 Documentation/devicetree/bindings/sound/cdns,jh8100-i2s.yaml > > diff --git a/Documentation/devicetree/bindings/sound/cdns,jh8100-i2s.yaml b/Documentation/devicetree/bindings/sound/cdns,jh8100-i2s.yaml > new file mode 100644 > index 000000000000..5d95d9ab3e45 > --- /dev/null > +++ b/Documentation/devicetree/bindings/sound/cdns,jh8100-i2s.yaml > @@ -0,0 +1,100 @@ > +# SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause) > +%YAML 1.2 > +--- > +$id: http://devicetree.org/schemas/sound/cdns,jh8100-i2s.yaml# Filename matching the compatible please. > +$schema: http://devicetree.org/meta-schemas/core.yaml# > + > +title: Cadence multi-channel I2S controller for StarFive JH8100 SoC > + > +description: | You only need the | if there is formatting to preserve. > + The Cadence I2S Controller implements a function of the multi-channel > + (up to 8-channel) bus. It combines functions of a transmitter and a receiver. > + It is used in the StarFive JH8100 SoC. > + > +maintainers: > + - Xingyu Wu <xingyu.wu@starfivetech.com> > + - Walker Chen <walker.chen@starfivetech.com> > + > +properties: > + compatible: > + const: starfive,jh8100-i2s > + > + reg: > + maxItems: 1 > + > + interrupts: > + description: | > + The interrupt line number for the I2S controller. Add this > + parameter if the I2S controller that you are using does not > + support DMA. You've got one i2s controller here, you should know if it supports DMA or not. > + maxItems: 1 > + > + clocks: > + items: > + - description: Bit clock > + - description: Main ICG clock > + - description: Inner master clock > + > + clock-names: > + items: > + - const: bclk > + - const: icg > + - const: mclk_inner > + > + resets: > + maxItems: 1 > + > + dmas: > + items: > + - description: TX DMA Channel > + - description: RX DMA Channel > + minItems: 1 > + > + dma-names: > + items: > + - const: tx > + - const: rx > + minItems: 1 > + > + cdns,i2s-max-channels: > + description: | > + Number of I2S max stereo channels supported by the hardware. > + $ref: /schemas/types.yaml#/definitions/uint32 > + minimum: 1 > + maximum: 8 Mark, is there no common property for this kind of thing? That said, there's one device here so the number is known at present. Another note, this property is not required, so it should have a default. It's kinda hard to know with this binding - it is touted as being for a particular Cadence IP, and some aspects are pretty generic, but at the same time there's only one device here so it's hard to tell what is variable between implementations and what is not. Are there no other implementations of this controller? Unless it is brand new, I find that hard to believe. Cheers, Conor. > + > + "#sound-dai-cells": > + const: 0 > + > +required: > + - compatible > + - reg > + - clocks > + - clock-names > + - resets > + > +oneOf: > + - required: > + - dmas > + - dma-names > + - required: > + - interrupts > + > +unevaluatedProperties: false > + > +examples: > + - | > + i2s@122b0000 { > + compatible = "starfive,jh8100-i2s"; > + reg = <0x122b0000 0x1000>; > + clocks = <&syscrg_ne 133>, > + <&syscrg_ne 170>, > + <&syscrg 50>; > + clock-names = "bclk", "icg", > + "mclk_inner"; > + resets = <&syscrg_ne 43>; > + dmas = <&dma 7>, <&dma 6>; > + dma-names = "tx", "rx"; > + cdns,i2s-max-channels = <2>; > + #sound-dai-cells = <0>; > + }; > -- > 2.25.1 > >
On Thu, Dec 21, 2023 at 01:53:00PM +0000, Conor Dooley wrote: > On Thu, Dec 21, 2023 at 11:32:22AM +0800, Xingyu Wu wrote: > > + cdns,i2s-max-channels: > > + description: | > > + Number of I2S max stereo channels supported by the hardware. > > + $ref: /schemas/types.yaml#/definitions/uint32 > > + minimum: 1 > > + maximum: 8 > Mark, is there no common property for this kind of thing? That said, > there's one device here so the number is known at present. > Another note, this property is not required, so it should have a > default. I wouldn't expect this to be a property in the first place, as currently presented this is specific to a single instance of the IP in a single SoC. In general this is something that is obvious from the compatible and doesn't need a property, it's only plausibly useful for Cadence and Designware which is a very short list of vendors.
On 21/12/2023 04:32, Xingyu Wu wrote: > + dma-names: > + items: > + - const: tx > + - const: rx > + minItems: 1 > + > + cdns,i2s-max-channels: Custom properties after generic, so after sound-dai-cells. The coding style now mentions this. > + description: | > + Number of I2S max stereo channels supported by the hardware. > + $ref: /schemas/types.yaml#/definitions/uint32 > + minimum: 1 > + maximum: 8 > + > + "#sound-dai-cells": > + const: 0 > + > +required: > + - compatible > + - reg > + - clocks > + - clock-names > + - resets > + > +oneOf: > + - required: > + - dmas > + - dma-names > + - required: > + - interrupts > + > +unevaluatedProperties: false This is not correct without allOf: which should point you to missing $ref to dai-common. Best regards, Krzysztof
On 2023/12/21 21:53, Conor Dooley wrote: > Xingyu, Mark, > > On Thu, Dec 21, 2023 at 11:32:22AM +0800, Xingyu Wu wrote: >> Add bindings for the Multi-Channel I2S controller of Cadence >> on the StarFive JH8100 SoC. >> >> Signed-off-by: Xingyu Wu <xingyu.wu@starfivetech.com> >> --- >> .../bindings/sound/cdns,jh8100-i2s.yaml | 100 ++++++++++++++++++ >> 1 file changed, 100 insertions(+) >> create mode 100644 Documentation/devicetree/bindings/sound/cdns,jh8100-i2s.yaml >> >> diff --git a/Documentation/devicetree/bindings/sound/cdns,jh8100-i2s.yaml b/Documentation/devicetree/bindings/sound/cdns,jh8100-i2s.yaml >> new file mode 100644 >> index 000000000000..5d95d9ab3e45 >> --- /dev/null >> +++ b/Documentation/devicetree/bindings/sound/cdns,jh8100-i2s.yaml >> @@ -0,0 +1,100 @@ >> +# SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause) >> +%YAML 1.2 >> +--- >> +$id: http://devicetree.org/schemas/sound/cdns,jh8100-i2s.yaml# > > Filename matching the compatible please. Noted. > >> +$schema: http://devicetree.org/meta-schemas/core.yaml# >> + >> +title: Cadence multi-channel I2S controller for StarFive JH8100 SoC >> + >> +description: | > > You only need the | if there is formatting to preserve. Will drop. > >> + The Cadence I2S Controller implements a function of the multi-channel >> + (up to 8-channel) bus. It combines functions of a transmitter and a receiver. >> + It is used in the StarFive JH8100 SoC. >> + >> +maintainers: >> + - Xingyu Wu <xingyu.wu@starfivetech.com> >> + - Walker Chen <walker.chen@starfivetech.com> >> + >> +properties: >> + compatible: >> + const: starfive,jh8100-i2s >> + >> + reg: >> + maxItems: 1 >> + >> + interrupts: >> + description: | >> + The interrupt line number for the I2S controller. Add this >> + parameter if the I2S controller that you are using does not >> + support DMA. > > You've got one i2s controller here, you should know if it supports DMA > or not. The I2S already supports interrupt handler, but if the SoC supports DMA controller to be use, it can optionally use DMA. > >> + maxItems: 1 >> + >> + clocks: >> + items: >> + - description: Bit clock >> + - description: Main ICG clock >> + - description: Inner master clock >> + >> + clock-names: >> + items: >> + - const: bclk >> + - const: icg >> + - const: mclk_inner >> + >> + resets: >> + maxItems: 1 >> + >> + dmas: >> + items: >> + - description: TX DMA Channel >> + - description: RX DMA Channel >> + minItems: 1 >> + >> + dma-names: >> + items: >> + - const: tx >> + - const: rx >> + minItems: 1 >> + >> + cdns,i2s-max-channels: >> + description: | >> + Number of I2S max stereo channels supported by the hardware. >> + $ref: /schemas/types.yaml#/definitions/uint32 >> + minimum: 1 >> + maximum: 8 > > Mark, is there no common property for this kind of thing? That said, > there's one device here so the number is known at present. > Another note, this property is not required, so it should have a > default. > > It's kinda hard to know with this binding - it is touted as being for a > particular Cadence IP, and some aspects are pretty generic, but at the > same time there's only one device here so it's hard to tell what is > variable between implementations and what is not. > Are there no other implementations of this controller? Unless it is > brand new, I find that hard to believe. > > Cheers, > Conor. > Sorry, It does not seem to be common property. The Cadence I2S supports 8 channels. There are four I2S controllers on the JH8100 SoC, and two of them just provide 4 channels to use, one of them just provide 2 channels. It seems to depend on the SoC. Thanks, Xingyu Wu >> + >> + "#sound-dai-cells": >> + const: 0 >> + >> +required: >> + - compatible >> + - reg >> + - clocks >> + - clock-names >> + - resets >> + >> +oneOf: >> + - required: >> + - dmas >> + - dma-names >> + - required: >> + - interrupts >> + >> +unevaluatedProperties: false >> + >> +examples: >> + - | >> + i2s@122b0000 { >> + compatible = "starfive,jh8100-i2s"; >> + reg = <0x122b0000 0x1000>; >> + clocks = <&syscrg_ne 133>, >> + <&syscrg_ne 170>, >> + <&syscrg 50>; >> + clock-names = "bclk", "icg", >> + "mclk_inner"; >> + resets = <&syscrg_ne 43>; >> + dmas = <&dma 7>, <&dma 6>; >> + dma-names = "tx", "rx"; >> + cdns,i2s-max-channels = <2>; >> + #sound-dai-cells = <0>; >> + }; >> -- >> 2.25.1 >> >>
On 2023/12/21 21:58, Mark Brown wrote: > On Thu, Dec 21, 2023 at 01:53:00PM +0000, Conor Dooley wrote: >> On Thu, Dec 21, 2023 at 11:32:22AM +0800, Xingyu Wu wrote: > >> > + cdns,i2s-max-channels: >> > + description: | >> > + Number of I2S max stereo channels supported by the hardware. >> > + $ref: /schemas/types.yaml#/definitions/uint32 >> > + minimum: 1 >> > + maximum: 8 > >> Mark, is there no common property for this kind of thing? That said, >> there's one device here so the number is known at present. >> Another note, this property is not required, so it should have a >> default. > > I wouldn't expect this to be a property in the first place, as currently > presented this is specific to a single instance of the IP in a single > SoC. In general this is something that is obvious from the compatible > and doesn't need a property, it's only plausibly useful for Cadence and > Designware which is a very short list of vendors. The Cadence I2S can support 8 channels. But on the JH8100 SoC, two instances of this just provide 4 channels to use, one just provides 2 channels, and the other one can provide 8 channels. Should I use the property name of 'jh8100,i2s-max-channels' instead for some special instances on the JH8100 SoC? Best regards, Xingyu Wu
On 2023/12/22 0:07, Krzysztof Kozlowski wrote: > On 21/12/2023 04:32, Xingyu Wu wrote: >> + dma-names: >> + items: >> + - const: tx >> + - const: rx >> + minItems: 1 >> + >> + cdns,i2s-max-channels: > > Custom properties after generic, so after sound-dai-cells. The coding > style now mentions this. > Noted. > >> + description: | >> + Number of I2S max stereo channels supported by the hardware. >> + $ref: /schemas/types.yaml#/definitions/uint32 >> + minimum: 1 >> + maximum: 8 >> + >> + "#sound-dai-cells": >> + const: 0 >> + >> +required: >> + - compatible >> + - reg >> + - clocks >> + - clock-names >> + - resets >> + >> +oneOf: >> + - required: >> + - dmas >> + - dma-names >> + - required: >> + - interrupts >> + >> +unevaluatedProperties: false > > This is not correct without allOf: which should point you to missing > $ref to dai-common. Will fix. > > > Best regards, > Krzysztof > Thanks, Xingyu Wu
On Fri, Dec 22, 2023 at 05:55:14PM +0800, Xingyu Wu wrote: > The Cadence I2S can support 8 channels. But on the JH8100 SoC, two > instances of this just provide 4 channels to use, one just provides 2 > channels, and the other one can provide 8 channels. Should I use the > property name of 'jh8100,i2s-max-channels' instead for some special > instances on the JH8100 SoC? No, your current name is fine if the binding is generic for all Cadence users. I do think it would be good to have a separate compatible for these two channel instances, if there's been one customisation there may well have been others. Please fix your mail client to word wrap within paragraphs at something substantially less than 80 columns. Doing this makes your messages much easier to read and reply to.
On 2023/12/22 21:03, Mark Brown wrote: > On Fri, Dec 22, 2023 at 05:55:14PM +0800, Xingyu Wu wrote: > >> The Cadence I2S can support 8 channels. But on the JH8100 SoC, two >> instances of this just provide 4 channels to use, one just provides 2 >> channels, and the other one can provide 8 channels. Should I use the >> property name of 'jh8100,i2s-max-channels' instead for some special >> instances on the JH8100 SoC? > > No, your current name is fine if the binding is generic for all Cadence > users. I do think it would be good to have a separate compatible for > these two channel instances, if there's been one customisation there may > well have been others. > > Please fix your mail client to word wrap within paragraphs at something > substantially less than 80 columns. Doing this makes your messages much > easier to read and reply to. Great, thank you for your support. Best regards, Xingyu Wu
diff --git a/Documentation/devicetree/bindings/sound/cdns,jh8100-i2s.yaml b/Documentation/devicetree/bindings/sound/cdns,jh8100-i2s.yaml new file mode 100644 index 000000000000..5d95d9ab3e45 --- /dev/null +++ b/Documentation/devicetree/bindings/sound/cdns,jh8100-i2s.yaml @@ -0,0 +1,100 @@ +# SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause) +%YAML 1.2 +--- +$id: http://devicetree.org/schemas/sound/cdns,jh8100-i2s.yaml# +$schema: http://devicetree.org/meta-schemas/core.yaml# + +title: Cadence multi-channel I2S controller for StarFive JH8100 SoC + +description: | + The Cadence I2S Controller implements a function of the multi-channel + (up to 8-channel) bus. It combines functions of a transmitter and a receiver. + It is used in the StarFive JH8100 SoC. + +maintainers: + - Xingyu Wu <xingyu.wu@starfivetech.com> + - Walker Chen <walker.chen@starfivetech.com> + +properties: + compatible: + const: starfive,jh8100-i2s + + reg: + maxItems: 1 + + interrupts: + description: | + The interrupt line number for the I2S controller. Add this + parameter if the I2S controller that you are using does not + support DMA. + maxItems: 1 + + clocks: + items: + - description: Bit clock + - description: Main ICG clock + - description: Inner master clock + + clock-names: + items: + - const: bclk + - const: icg + - const: mclk_inner + + resets: + maxItems: 1 + + dmas: + items: + - description: TX DMA Channel + - description: RX DMA Channel + minItems: 1 + + dma-names: + items: + - const: tx + - const: rx + minItems: 1 + + cdns,i2s-max-channels: + description: | + Number of I2S max stereo channels supported by the hardware. + $ref: /schemas/types.yaml#/definitions/uint32 + minimum: 1 + maximum: 8 + + "#sound-dai-cells": + const: 0 + +required: + - compatible + - reg + - clocks + - clock-names + - resets + +oneOf: + - required: + - dmas + - dma-names + - required: + - interrupts + +unevaluatedProperties: false + +examples: + - | + i2s@122b0000 { + compatible = "starfive,jh8100-i2s"; + reg = <0x122b0000 0x1000>; + clocks = <&syscrg_ne 133>, + <&syscrg_ne 170>, + <&syscrg 50>; + clock-names = "bclk", "icg", + "mclk_inner"; + resets = <&syscrg_ne 43>; + dmas = <&dma 7>, <&dma 6>; + dma-names = "tx", "rx"; + cdns,i2s-max-channels = <2>; + #sound-dai-cells = <0>; + };
Add bindings for the Multi-Channel I2S controller of Cadence on the StarFive JH8100 SoC. Signed-off-by: Xingyu Wu <xingyu.wu@starfivetech.com> --- .../bindings/sound/cdns,jh8100-i2s.yaml | 100 ++++++++++++++++++ 1 file changed, 100 insertions(+) create mode 100644 Documentation/devicetree/bindings/sound/cdns,jh8100-i2s.yaml