From patchwork Wed Jan 10 09:44:11 2024 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Vijendar Mukunda X-Patchwork-Id: 13515859 Received: from NAM11-BN8-obe.outbound.protection.outlook.com (mail-bn8nam11on2040.outbound.protection.outlook.com [40.107.236.40]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 6001F4121F; Wed, 10 Jan 2024 09:46:04 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=quarantine dis=none) header.from=amd.com Authentication-Results: smtp.subspace.kernel.org; spf=fail smtp.mailfrom=amd.com Authentication-Results: smtp.subspace.kernel.org; dkim=pass (1024-bit key) header.d=amd.com header.i=@amd.com header.b="bUFhfDZD" ARC-Seal: i=1; a=rsa-sha256; s=arcselector9901; d=microsoft.com; cv=none; b=cQSJOmUZtiZgiGLrEEo3OMROYYoCfVXwpimysp3nEETnXpe4ScNbYhhYvLzNV7I1lNSSgN3ebbhhSpnfn9r7XHPRd5o830Ur4K/3GfXTAlQYi3OM5ZDxWEQm5mUoNNUKaTQjvK3S45qO7rvpTYvthuz5ySMZCw2l7a7wDNwXNZeDnOMTZWQtuLGhJNgo5WZccv2vVx+ULVCyWfpIw5GjoRuYCTT8biW8KGWoo/okTRqpluwEyKZ/MP06TUWdR6swZKgEkhpw5OnVOvNV5Tu8+nLFaY/s+jx6h4wNrisjyj3Cf24oIxum+HvWgLUBSmulbA4ZShPtNhqj+hMBzJUXjA== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=microsoft.com; s=arcselector9901; h=From:Date:Subject:Message-ID:Content-Type:MIME-Version:X-MS-Exchange-AntiSpam-MessageData-ChunkCount:X-MS-Exchange-AntiSpam-MessageData-0:X-MS-Exchange-AntiSpam-MessageData-1; bh=WmSvbdZheoMbrfrMOra1kGeyoKcwdWWrtw+v++Bk0J8=; b=dd+6QzXJWY3lzAlW3xbAa27w3XRT5QiVKQRtmUMyVCEg7lcmxH0AC+pxBCDe6x71yEojpYJzwOmxVByl4qf3P08R7mpiNW6HGcFFxV+feXrg3rpW5KuU/BnFAHHHLRQv5jdxl0poM4GavVOkWu1wz2DlkqIt+r++7Km5FupCHYt/xan1vE50Esi4rU/xqS/pKeFEy89DtfH9TuK/8jBd2hlUqAHxBTNbgDbvQs94wKom5N4oRX/muDMc/3D9q04xsNkLVWB18iuVQ6NwoZ9khiU3/fLn8lq6UJ4jZMsKsrIMiRQl/iMgo6SQI/hgpPW3PTQVk6ek58ZPVsUAqVVo4Q== ARC-Authentication-Results: i=1; mx.microsoft.com 1; spf=pass (sender ip is 165.204.84.17) smtp.rcpttodomain=kernel.org smtp.mailfrom=amd.com; dmarc=pass (p=quarantine sp=quarantine pct=100) action=none header.from=amd.com; dkim=none (message not signed); arc=none (0) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=amd.com; s=selector1; h=From:Date:Subject:Message-ID:Content-Type:MIME-Version:X-MS-Exchange-SenderADCheck; bh=WmSvbdZheoMbrfrMOra1kGeyoKcwdWWrtw+v++Bk0J8=; b=bUFhfDZDpVknpEko3r8TIDsxM4IJmAXxDHIcMjOAZJd1sf+sPsy5F6vzBts0SBiY29qYtqh6ztZqspgeictIFJXmt7T0zoXodDelroNs4yLB4fKiH0kXYdbYZKWv1+iEztR/Fg1naxQycfXWr6oW8M7XRPH8iD1xxdi0SVi7qiQ= Received: from SN7PR04CA0231.namprd04.prod.outlook.com (2603:10b6:806:127::26) by MN2PR12MB4391.namprd12.prod.outlook.com (2603:10b6:208:269::21) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id 15.20.7181.18; Wed, 10 Jan 2024 09:46:01 +0000 Received: from SA2PEPF00001509.namprd04.prod.outlook.com (2603:10b6:806:127:cafe::d) by SN7PR04CA0231.outlook.office365.com (2603:10b6:806:127::26) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id 15.20.7159.23 via Frontend Transport; Wed, 10 Jan 2024 09:46:01 +0000 X-MS-Exchange-Authentication-Results: spf=pass (sender IP is 165.204.84.17) smtp.mailfrom=amd.com; dkim=none (message not signed) header.d=none;dmarc=pass action=none header.from=amd.com; Received-SPF: Pass (protection.outlook.com: domain of amd.com designates 165.204.84.17 as permitted sender) receiver=protection.outlook.com; client-ip=165.204.84.17; helo=SATLEXMB04.amd.com; pr=C Received: from SATLEXMB04.amd.com (165.204.84.17) by SA2PEPF00001509.mail.protection.outlook.com (10.167.242.41) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_128_GCM_SHA256) id 15.20.7181.14 via Frontend Transport; Wed, 10 Jan 2024 09:46:00 +0000 Received: from SATLEXMB05.amd.com (10.181.40.146) by SATLEXMB04.amd.com (10.181.40.145) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_128_GCM_SHA256) id 15.1.2507.34; Wed, 10 Jan 2024 03:45:57 -0600 Received: from SATLEXMB04.amd.com (10.181.40.145) by SATLEXMB05.amd.com (10.181.40.146) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_128_GCM_SHA256) id 15.1.2507.34; Wed, 10 Jan 2024 03:45:56 -0600 Received: from vijendar-X570-GAMING-X.amd.com (10.180.168.240) by SATLEXMB04.amd.com (10.181.40.145) with Microsoft SMTP Server id 15.1.2507.34 via Frontend Transport; Wed, 10 Jan 2024 03:45:51 -0600 From: Vijendar Mukunda To: , CC: , , , , , , , Vijendar Mukunda , Liam Girdwood , Peter Ujfalusi , Ranjani Sridharan , Daniel Baluta , Kai Vehmanen , Jaroslav Kysela , Takashi Iwai , Mastan Katragadda , V sujith kumar Reddy , "moderated list:SOUND - SOUND OPEN FIRMWARE (SOF) DRIVERS" , "open list:SOUND - SOC LAYER / DYNAMIC AUDIO POWER MANAGEM..." , "open list" Subject: [PATCH V2 08/13] ASoC: SOF: amd: add interrupt handling for SoundWire manager devices Date: Wed, 10 Jan 2024 15:14:11 +0530 Message-ID: <20240110094416.853610-9-Vijendar.Mukunda@amd.com> X-Mailer: git-send-email 2.34.1 In-Reply-To: <20240110094416.853610-1-Vijendar.Mukunda@amd.com> References: <20240110094416.853610-1-Vijendar.Mukunda@amd.com> Precedence: bulk X-Mailing-List: linux-sound@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 X-EOPAttributedMessage: 0 X-MS-PublicTrafficType: Email X-MS-TrafficTypeDiagnostic: SA2PEPF00001509:EE_|MN2PR12MB4391:EE_ X-MS-Office365-Filtering-Correlation-Id: 708edc59-a344-49eb-d469-08dc11c0f447 X-MS-Exchange-SenderADCheck: 1 X-MS-Exchange-AntiSpam-Relay: 0 X-Microsoft-Antispam: BCL:0; X-Microsoft-Antispam-Message-Info: UhUTWUC3edmlXaDYlM5+a//YPnqxiBf7RTJioC9AwJsbTC0zNLRZG10EOuMHAnpLAMXREpPQUiuWHLcpHuCF9w0bNgojq2BzMv4ol6dXW9XV0q74hr9HFlD79C9vPj6LOcMywun+wbcnOf7km1rG1h7Sh6ScRADsQFwFWGnNpEdKi/hge8b3QBeCRqr6BPfgWA25lLuJIBEIsAbhlRYMOJZH2yXQdOu1uVUB7ZL7QNnUzW/XpIhNeJV7Bv3hGrrpsBU8inXjvsdaS5fbTyZkB3oWV6vCE3kPC+PE25+i1+y6PYIWiwPpxjcDrO/0qyI+8sgZfVXCVgJp2+LImLizxQ3tmrkbFonuNbCZgvkC5agH40VSzeHd1XIjF6/hPueF6er8pdoua+izw5VBwS4hByd2O2zDeB5lYjSRVlX/FtjWs+N1dWyxoKd7vky/kfRjHnFznzpDW1bius5o1XEo9cX24s2pYt0gmZoecA9wWtydNFRYpVWmUoECjx15PYQZQSZrsqwxOj5r+ssM5UjhUnBJXDilPb2/4MQLmy83cXasoRSFnTNCJ055OTty95JB+xzTTXFnTAffSGF6AHyBPNRCT46w9AliHXzeUx4CLDU6w/igr69ZCp4B3DXMlGP1LXHe+4xjQ8R+a+HXM1K2HyX8TjfRT033hGH/x6uioQHZpl8oPZ4vLuNUWg6zRGgxJ9cTKdar7Dz1qTvceQR6v/Pqj2x0lQ7tsynHq87sIuj2SDMvjgj+mr5zO28Ws1N4uTY+a2hDDEcBEfFZ4EIXIA== X-Forefront-Antispam-Report: CIP:165.204.84.17;CTRY:US;LANG:en;SCL:1;SRV:;IPV:CAL;SFV:NSPM;H:SATLEXMB04.amd.com;PTR:InfoDomainNonexistent;CAT:NONE;SFS:(13230031)(4636009)(396003)(136003)(376002)(346002)(39860400002)(230922051799003)(451199024)(64100799003)(186009)(1800799012)(82310400011)(36840700001)(46966006)(40470700004)(82740400003)(36860700001)(36756003)(86362001)(41300700001)(81166007)(356005)(4326008)(8936002)(8676002)(316002)(110136005)(54906003)(70586007)(70206006)(26005)(2616005)(40480700001)(40460700003)(1076003)(426003)(336012)(6666004)(7696005)(478600001)(7416002)(47076005)(5660300002)(2906002)(83380400001)(36900700001);DIR:OUT;SFP:1101; X-OriginatorOrg: amd.com X-MS-Exchange-CrossTenant-OriginalArrivalTime: 10 Jan 2024 09:46:00.9040 (UTC) X-MS-Exchange-CrossTenant-Network-Message-Id: 708edc59-a344-49eb-d469-08dc11c0f447 X-MS-Exchange-CrossTenant-Id: 3dd8961f-e488-4e60-8e11-a82d994e183d X-MS-Exchange-CrossTenant-OriginalAttributedTenantConnectingIp: TenantId=3dd8961f-e488-4e60-8e11-a82d994e183d;Ip=[165.204.84.17];Helo=[SATLEXMB04.amd.com] X-MS-Exchange-CrossTenant-AuthSource: SA2PEPF00001509.namprd04.prod.outlook.com X-MS-Exchange-CrossTenant-AuthAs: Anonymous X-MS-Exchange-CrossTenant-FromEntityHeader: HybridOnPrem X-MS-Exchange-Transport-CrossTenantHeadersStamped: MN2PR12MB4391 Add support for interrupt handling for soundwire manager platform devices. Signed-off-by: Vijendar Mukunda --- sound/soc/sof/amd/acp-dsp-offset.h | 4 ++++ sound/soc/sof/amd/acp.c | 38 +++++++++++++++++++++++++++++- sound/soc/sof/amd/acp.h | 5 ++++ 3 files changed, 46 insertions(+), 1 deletion(-) diff --git a/sound/soc/sof/amd/acp-dsp-offset.h b/sound/soc/sof/amd/acp-dsp-offset.h index a913f1cc4c80..7ba6492b8e99 100644 --- a/sound/soc/sof/amd/acp-dsp-offset.h +++ b/sound/soc/sof/amd/acp-dsp-offset.h @@ -78,6 +78,10 @@ #define ACP5X_AXI2DAGB_SEM_0 0x1884 #define ACP6X_AXI2DAGB_SEM_0 0x1874 +/* ACP common registers to report errors related to I2S & SoundWire interfaces */ +#define ACP_SW0_I2S_ERROR_REASON 0x18B4 +#define ACP_SW1_I2S_ERROR_REASON 0x1A50 + /* Registers from ACP_SHA block */ #define ACP_SHA_DSP_FW_QUALIFIER 0x1C70 #define ACP_SHA_DMA_CMD 0x1CB0 diff --git a/sound/soc/sof/amd/acp.c b/sound/soc/sof/amd/acp.c index f24cd6b7490f..7a34faae9889 100644 --- a/sound/soc/sof/amd/acp.c +++ b/sound/soc/sof/amd/acp.c @@ -375,10 +375,13 @@ static irqreturn_t acp_irq_thread(int irq, void *context) static irqreturn_t acp_irq_handler(int irq, void *dev_id) { + struct amd_sdw_manager *amd_manager; struct snd_sof_dev *sdev = dev_id; const struct sof_amd_acp_desc *desc = get_chip_info(sdev->pdata); + struct acp_dev_data *adata = sdev->pdata->hw_pdata; unsigned int base = desc->dsp_intr_base; unsigned int val; + int irq_flag = 0; val = snd_sof_dsp_read(sdev, ACP_DSP_BAR, base + DSP_SW_INTR_STAT_OFFSET); if (val & ACP_DSP_TO_HOST_IRQ) { @@ -387,7 +390,38 @@ static irqreturn_t acp_irq_handler(int irq, void *dev_id) return IRQ_WAKE_THREAD; } - return IRQ_NONE; + val = snd_sof_dsp_read(sdev, ACP_DSP_BAR, desc->ext_intr_stat); + if (val & ACP_SDW0_IRQ_MASK) { + amd_manager = dev_get_drvdata(&adata->sdw->pdev[0]->dev); + snd_sof_dsp_write(sdev, ACP_DSP_BAR, desc->ext_intr_stat, ACP_SDW0_IRQ_MASK); + if (amd_manager) + schedule_work(&amd_manager->amd_sdw_irq_thread); + irq_flag = 1; + } + + if (val & ACP_ERROR_IRQ_MASK) { + snd_sof_dsp_write(sdev, ACP_DSP_BAR, desc->ext_intr_stat, ACP_ERROR_IRQ_MASK); + snd_sof_dsp_write(sdev, ACP_DSP_BAR, base + ACP_SW0_I2S_ERROR_REASON, 0); + snd_sof_dsp_write(sdev, ACP_DSP_BAR, base + ACP_SW1_I2S_ERROR_REASON, 0); + snd_sof_dsp_write(sdev, ACP_DSP_BAR, base + ACP_ERROR_STATUS, 0); + irq_flag = 1; + } + + if (desc->ext_intr_stat1) { + val = snd_sof_dsp_read(sdev, ACP_DSP_BAR, desc->ext_intr_stat1); + if (val & ACP_SDW1_IRQ_MASK) { + amd_manager = dev_get_drvdata(&adata->sdw->pdev[1]->dev); + snd_sof_dsp_write(sdev, ACP_DSP_BAR, desc->ext_intr_stat1, + ACP_SDW1_IRQ_MASK); + if (amd_manager) + schedule_work(&amd_manager->amd_sdw_irq_thread); + irq_flag = 1; + } + } + if (irq_flag) + return IRQ_HANDLED; + else + return IRQ_NONE; } static int acp_power_on(struct snd_sof_dev *sdev) @@ -443,6 +477,8 @@ static int acp_reset(struct snd_sof_dev *sdev) if (desc->ext_intr_enb) snd_sof_dsp_write(sdev, ACP_DSP_BAR, desc->ext_intr_enb, 0x01); + if (desc->ext_intr_cntl) + snd_sof_dsp_write(sdev, ACP_DSP_BAR, desc->ext_intr_cntl, ACP_ERROR_IRQ_MASK); return ret; } diff --git a/sound/soc/sof/amd/acp.h b/sound/soc/sof/amd/acp.h index e88d01330ec7..2058dae32659 100644 --- a/sound/soc/sof/amd/acp.h +++ b/sound/soc/sof/amd/acp.h @@ -93,6 +93,9 @@ #define PROBE_STATUS_BIT BIT(31) #define ACP_FIRMWARE_SIGNATURE 0x100 +#define ACP_ERROR_IRQ_MASK BIT(29) +#define ACP_SDW0_IRQ_MASK BIT(21) +#define ACP_SDW1_IRQ_MASK BIT(2) #define ACP_DEFAULT_SRAM_LENGTH 0x00080000 #define ACP_SRAM_PAGE_COUNT 128 @@ -184,7 +187,9 @@ struct sof_amd_acp_desc { unsigned int host_bridge_id; u32 pgfsm_base; u32 ext_intr_enb; + u32 ext_intr_cntl; u32 ext_intr_stat; + u32 ext_intr_stat1; u32 dsp_intr_base; u32 sram_pte_offset; u32 hw_semaphore_offset;