From patchwork Mon May 13 10:38:08 2024 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: "D, Lakshmi Sowjanya" X-Patchwork-Id: 13663299 Received: from mgamail.intel.com (mgamail.intel.com [192.198.163.8]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 48EC215216C; Mon, 13 May 2024 10:39:07 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=192.198.163.8 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1715596748; cv=none; b=IsvlOZRqIiV9KTq3wSdfbKWJaSZe7Pr/UrpoBb4JsIQJhL2xy9R8DxhQoQ6VCt4AFH1ZFDXbNOgsHlSPW6bS3lnel0Oz6czbQUlJFrZJX4oBWV8znXY62uAyarrfP0jXKAU/itJHCQDKX8zKARd4U/dxXi6b3iLGvL6kGB8/G+I= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1715596748; c=relaxed/simple; bh=xuPQa1kIsy6SGj3PJA3KBmf/9PrLBCxMl+O+pD4au58=; h=From:To:Cc:Subject:Date:Message-Id:In-Reply-To:References: MIME-Version; b=ImjgeEG46f3BEcEPUA3DQOA0VX1ajZXBrT2QeRKtE2F99N0+qvAXEE8CLxZN1AuD0hSaGJMEy6l4krh3fNk/kc9gXN+4tuuwbcQOn+YPsIHaxT/ni8TNOVBcD1i/rIymziRoy27DH8z4bFbyasWpRhRuxNe1ud/DKjE2/W81Q78= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=intel.com; spf=pass smtp.mailfrom=intel.com; dkim=pass (2048-bit key) header.d=intel.com header.i=@intel.com header.b=hWxJx57B; arc=none smtp.client-ip=192.198.163.8 Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=intel.com Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=intel.com Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=intel.com header.i=@intel.com header.b="hWxJx57B" DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=intel.com; i=@intel.com; q=dns/txt; s=Intel; t=1715596747; x=1747132747; h=from:to:cc:subject:date:message-id:in-reply-to: references:mime-version:content-transfer-encoding; bh=xuPQa1kIsy6SGj3PJA3KBmf/9PrLBCxMl+O+pD4au58=; b=hWxJx57Br2W8QBB7zFrakq/hy6U/gtOMjqV2+//dOe4E1HP8fuS7Ffsq wibDm4yF487FFSsmihVbBkIitWnX/ujop1k/U9yIWVt0ctW/tV9dEDcvG x2Mgcpdvgq4k4KN6RkRNGLCJWvTQYeZ61JjxKALpdsRWgXYJ9VTThJz6f cc/8bDTHwXgeUxa8yC/5wZjG36HjXrzfRTQVuYf/kgTwAsE7KmbJMey99 PWztCI/ukP6Wbzp3liOddFfZoIw6aXLEKjJpaEBPp+v8TQn7O1GuzIuXt /LJWB7LUgIXBIGNsvvf73M9S4q+j5hMza8T0W7y2QmpkH5k0gCnZ1sxQm g==; X-CSE-ConnectionGUID: e5uyrCr4TFCH0tyt+DAJtQ== X-CSE-MsgGUID: TP8iqae8RNqznHbpgyH/NA== X-IronPort-AV: E=McAfee;i="6600,9927,11071"; a="29039069" X-IronPort-AV: E=Sophos;i="6.08,158,1712646000"; d="scan'208";a="29039069" Received: from fmviesa001.fm.intel.com ([10.60.135.141]) by fmvoesa102.fm.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 13 May 2024 03:39:06 -0700 X-CSE-ConnectionGUID: vWKrWAPZRwC6eTwKb0O9dw== X-CSE-MsgGUID: RJzYPrC6S5Sxk+bsHPMx6w== X-ExtLoop1: 1 X-IronPort-AV: E=Sophos;i="6.08,158,1712646000"; d="scan'208";a="61481751" Received: from inlubt0316.iind.intel.com ([10.191.20.213]) by fmviesa001.fm.intel.com with ESMTP; 13 May 2024 03:38:59 -0700 From: lakshmi.sowjanya.d@intel.com To: tglx@linutronix.de, jstultz@google.com, giometti@enneenne.com, corbet@lwn.net, linux-kernel@vger.kernel.org Cc: x86@kernel.org, netdev@vger.kernel.org, linux-doc@vger.kernel.org, intel-wired-lan@lists.osuosl.org, andriy.shevchenko@linux.intel.com, eddie.dong@intel.com, christopher.s.hall@intel.com, jesse.brandeburg@intel.com, davem@davemloft.net, alexandre.torgue@foss.st.com, joabreu@synopsys.com, mcoquelin.stm32@gmail.com, perex@perex.cz, linux-sound@vger.kernel.org, anthony.l.nguyen@intel.com, peter.hilber@opensynergy.com, pandith.n@intel.com, subramanian.mohan@intel.com, thejesh.reddy.t.r@intel.com, lakshmi.sowjanya.d@intel.com Subject: [PATCH v8 07/12] ice/ptp: remove convert_art_to_tsc() Date: Mon, 13 May 2024 16:08:08 +0530 Message-Id: <20240513103813.5666-8-lakshmi.sowjanya.d@intel.com> X-Mailer: git-send-email 2.35.3 In-Reply-To: <20240513103813.5666-1-lakshmi.sowjanya.d@intel.com> References: <20240513103813.5666-1-lakshmi.sowjanya.d@intel.com> Precedence: bulk X-Mailing-List: linux-sound@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 From: Thomas Gleixner The core code provides a mechanism to convert the ART base clock to the corresponding TSC value without requiring an architecture specific function. All what is required is to store the ART clocksoure ID and the cycles value in the provided system_counterval structure. Replace the direct conversion via convert_art_to_tsc() by filling in the required data. No functional change intended. Signed-off-by: Thomas Gleixner Signed-off-by: Lakshmi Sowjanya D --- drivers/net/ethernet/intel/ice/ice_ptp.c | 3 ++- 1 file changed, 2 insertions(+), 1 deletion(-) diff --git a/drivers/net/ethernet/intel/ice/ice_ptp.c b/drivers/net/ethernet/intel/ice/ice_ptp.c index c11eba07283c..c416dd2e6622 100644 --- a/drivers/net/ethernet/intel/ice/ice_ptp.c +++ b/drivers/net/ethernet/intel/ice/ice_ptp.c @@ -2116,7 +2116,8 @@ ice_ptp_get_syncdevicetime(ktime_t *device, hh_ts_lo = rd32(hw, GLHH_ART_TIME_L); hh_ts_hi = rd32(hw, GLHH_ART_TIME_H); hh_ts = ((u64)hh_ts_hi << 32) | hh_ts_lo; - *system = convert_art_ns_to_tsc(hh_ts); + system->cycles = hh_ts; + system->cs_id = CSID_X86_ART; /* Read Device source clock time */ hh_ts_lo = rd32(hw, GLTSYN_HHTIME_L(tmr_idx)); hh_ts_hi = rd32(hw, GLTSYN_HHTIME_H(tmr_idx));