| Message ID | 20240604184752.697313-1-a1ba.omarov@gmail.com (mailing list archive) |
|---|---|
| State | Accepted |
| Commit | ccd8d753f0fe8f16745fa2b6be5946349731d901 |
| Headers | show |
| Series | ASoC: rockchip: i2s-tdm: Fix trcm mode by setting clock on right mclk | expand |
Hello Alibek, On Tue, 4 Jun 2024 21:47:52 +0300 Alibek Omarov <a1ba.omarov@gmail.com> wrote: > When TRCM mode is enabled, I2S RX and TX clocks are synchronized through > selected clock source. Without this fix BCLK and LRCK might get parented > to an uninitialized MCLK and the DAI will receive data at wrong pace. > > However, unlike in original i2s-tdm driver, there is no need to manually > synchronize mclk_rx and mclk_tx, as only one gets used anyway. > > Tested on a board with RK3568 SoC and Silergy SY24145S codec with enabled and > disabled TRCM mode. > > Fixes: 9e2ab4b18ebd ("ASoC: rockchip: i2s-tdm: Fix inaccurate sampling rates") > Signed-off-by: Alibek Omarov <a1ba.omarov@gmail.com> > --- > sound/soc/rockchip/rockchip_i2s_tdm.c | 13 +++++++++++-- > 1 file changed, 11 insertions(+), 2 deletions(-) > > diff --git a/sound/soc/rockchip/rockchip_i2s_tdm.c b/sound/soc/rockchip/rockchip_i2s_tdm.c > index 9fa020ef7eab..ee517d7b5b7b 100644 > --- a/sound/soc/rockchip/rockchip_i2s_tdm.c > +++ b/sound/soc/rockchip/rockchip_i2s_tdm.c > @@ -655,8 +655,17 @@ static int rockchip_i2s_tdm_hw_params(struct snd_pcm_substream *substream, > int err; > > if (i2s_tdm->is_master_mode) { > - struct clk *mclk = (substream->stream == SNDRV_PCM_STREAM_PLAYBACK) ? > - i2s_tdm->mclk_tx : i2s_tdm->mclk_rx; > + struct clk *mclk; > + > + if (i2s_tdm->clk_trcm == TRCM_TX) { > + mclk = i2s_tdm->mclk_tx; > + } else if (i2s_tdm->clk_trcm == TRCM_RX) { > + mclk = i2s_tdm->mclk_rx; > + } else if (substream->stream == SNDRV_PCM_STREAM_PLAYBACK) { > + mclk = i2s_tdm->mclk_tx; > + } else { > + mclk = i2s_tdm->mclk_rx; > + } I cannot test right now, but it definitely looks correct. Reviewed-by: Luca Ceresoli <luca.ceresoli@bootlin.com>
> > I cannot test right now, but it definitely looks correct. > > Reviewed-by: Luca Ceresoli <luca.ceresoli@bootlin.com> > Thank you very much!
On Tue, 04 Jun 2024 21:47:52 +0300, Alibek Omarov wrote: > When TRCM mode is enabled, I2S RX and TX clocks are synchronized through > selected clock source. Without this fix BCLK and LRCK might get parented > to an uninitialized MCLK and the DAI will receive data at wrong pace. > > However, unlike in original i2s-tdm driver, there is no need to manually > synchronize mclk_rx and mclk_tx, as only one gets used anyway. > > [...] Applied to https://git.kernel.org/pub/scm/linux/kernel/git/broonie/sound.git for-next Thanks! [1/1] ASoC: rockchip: i2s-tdm: Fix trcm mode by setting clock on right mclk commit: ccd8d753f0fe8f16745fa2b6be5946349731d901 All being well this means that it will be integrated into the linux-next tree (usually sometime in the next 24 hours) and sent to Linus during the next merge window (or sooner if it is a bug fix), however if problems are discovered then the patch may be dropped or reverted. You may get further e-mails resulting from automated or manual testing and review of the tree, please engage with people reporting problems and send followup patches addressing any issues that are reported if needed. If any updates are required or you are submitting further changes they should be sent as incremental updates against current git, existing patches will not be replaced. Please add any relevant lists and maintainers to the CCs when replying to this mail. Thanks, Mark
diff --git a/sound/soc/rockchip/rockchip_i2s_tdm.c b/sound/soc/rockchip/rockchip_i2s_tdm.c index 9fa020ef7eab..ee517d7b5b7b 100644 --- a/sound/soc/rockchip/rockchip_i2s_tdm.c +++ b/sound/soc/rockchip/rockchip_i2s_tdm.c @@ -655,8 +655,17 @@ static int rockchip_i2s_tdm_hw_params(struct snd_pcm_substream *substream, int err; if (i2s_tdm->is_master_mode) { - struct clk *mclk = (substream->stream == SNDRV_PCM_STREAM_PLAYBACK) ? - i2s_tdm->mclk_tx : i2s_tdm->mclk_rx; + struct clk *mclk; + + if (i2s_tdm->clk_trcm == TRCM_TX) { + mclk = i2s_tdm->mclk_tx; + } else if (i2s_tdm->clk_trcm == TRCM_RX) { + mclk = i2s_tdm->mclk_rx; + } else if (substream->stream == SNDRV_PCM_STREAM_PLAYBACK) { + mclk = i2s_tdm->mclk_tx; + } else { + mclk = i2s_tdm->mclk_rx; + } err = clk_set_rate(mclk, DEFAULT_MCLK_FS * params_rate(params)); if (err)
When TRCM mode is enabled, I2S RX and TX clocks are synchronized through selected clock source. Without this fix BCLK and LRCK might get parented to an uninitialized MCLK and the DAI will receive data at wrong pace. However, unlike in original i2s-tdm driver, there is no need to manually synchronize mclk_rx and mclk_tx, as only one gets used anyway. Tested on a board with RK3568 SoC and Silergy SY24145S codec with enabled and disabled TRCM mode. Fixes: 9e2ab4b18ebd ("ASoC: rockchip: i2s-tdm: Fix inaccurate sampling rates") Signed-off-by: Alibek Omarov <a1ba.omarov@gmail.com> --- sound/soc/rockchip/rockchip_i2s_tdm.c | 13 +++++++++++-- 1 file changed, 11 insertions(+), 2 deletions(-)