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Fri, 7 Jun 2024 12:00:55 +0200 (CEST) Received: by pc49102-2217.se.axis.com (Postfix, from userid 9470) id D54EA6476FDB; Fri, 7 Jun 2024 12:00:55 +0200 (CEST) From: Ricard Wanderlof Date: Fri, 7 Jun 2024 12:00:45 +0200 Subject: [PATCH v2 1/2] ASoC: dt-bindings: tlv320adc3xxx: Add MICBIAS-as-GPO properties Precedence: bulk X-Mailing-List: linux-sound@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Message-ID: <20240607-tlv320adc3xxx-micbias-gpo-v2-1-b140a45ffffe@axis.com> References: <20240607-tlv320adc3xxx-micbias-gpo-v2-0-b140a45ffffe@axis.com> In-Reply-To: <20240607-tlv320adc3xxx-micbias-gpo-v2-0-b140a45ffffe@axis.com> To: Mark Brown , Liam Girdwood , Shenghao Ding , Kevin Lu , Baojun Xu , Rob Herring , Krzysztof Kozlowski , Conor Dooley , Ricard Wanderlof , Jaroslav Kysela , Takashi Iwai CC: , , , , "Ricard Wanderlof" , X-Mailer: b4 0.13.0 X-EOPAttributedMessage: 0 X-MS-PublicTrafficType: Email X-MS-TrafficTypeDiagnostic: AMS0EPF00000195:EE_|GVXPR02MB8280:EE_ X-MS-Office365-Filtering-Correlation-Id: 7df3793d-0d6a-421b-1396-08dc86d8baea X-MS-Exchange-SenderADCheck: 1 X-MS-Exchange-AntiSpam-Relay: 0 X-Microsoft-Antispam: BCL:0;ARA:13230031|82310400017|1800799015|376005|7416005|36860700004|921011; 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X-OriginatorOrg: axis.com X-MS-Exchange-CrossTenant-OriginalArrivalTime: 07 Jun 2024 10:00:58.6259 (UTC) X-MS-Exchange-CrossTenant-Network-Message-Id: 7df3793d-0d6a-421b-1396-08dc86d8baea X-MS-Exchange-CrossTenant-Id: 78703d3c-b907-432f-b066-88f7af9ca3af X-MS-Exchange-CrossTenant-OriginalAttributedTenantConnectingIp: TenantId=78703d3c-b907-432f-b066-88f7af9ca3af;Ip=[195.60.68.100];Helo=[mail.axis.com] X-MS-Exchange-CrossTenant-AuthSource: AMS0EPF00000195.eurprd05.prod.outlook.com X-MS-Exchange-CrossTenant-AuthAs: Anonymous X-MS-Exchange-CrossTenant-FromEntityHeader: HybridOnPrem X-MS-Exchange-Transport-CrossTenantHeadersStamped: GVXPR02MB8280 Add properties for configuring the MICBIAS pins as general purpose outputs, with some limitations: The voltage on the pin when activated may be set using another property to 2.0 V, 2.5 V or AVDD. When deactivated the pin will float. Signed-off-by: Ricard Wanderlof --- .../bindings/sound/ti,tlv320adc3xxx.yaml | 24 ++++++++++++++++++++++ 1 file changed, 24 insertions(+) diff --git a/Documentation/devicetree/bindings/sound/ti,tlv320adc3xxx.yaml b/Documentation/devicetree/bindings/sound/ti,tlv320adc3xxx.yaml index ede14ca2c07a..b7cae1c65e84 100644 --- a/Documentation/devicetree/bindings/sound/ti,tlv320adc3xxx.yaml +++ b/Documentation/devicetree/bindings/sound/ti,tlv320adc3xxx.yaml @@ -82,6 +82,26 @@ properties: Note that there is currently no support for reading the GPIO pins as inputs. + ti,micbias1-gpo: + type: boolean + description: | + When set, the MICBIAS1 pin may be controlled via the GPIO framework, + as pin number 3 on the device. + + In this mode, when the pin is activated, it will be set to the voltage + specified by the ti,micbias1-vg property. When deactivated, the pin will + float. + + ti,micbias2-gpo: + type: boolean + description: | + When set, the MICBIAS2 pin may be controlled via the GPIO framework, + as pin number 4 on the device. + + In this mode, when the pin is activated, it will be set to the voltage + specified by the ti,micbias2-vg property. When deactivated, the pin will + float. + ti,micbias1-vg: $ref: /schemas/types.yaml#/definitions/uint32 enum: @@ -104,6 +124,10 @@ properties: description: | Mic bias voltage output on MICBIAS2 pin +dependencies: + ti,micbias1-gpio: [ti,micbias1-vg] + ti,micbias2-gpio: [ti,micbias2-vg] + required: - compatible - reg