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Thu, 31 Oct 2024 17:59:30 -0700 (PDT) Received: from localhost.localdomain ([2.222.231.247]) by smtp.gmail.com with ESMTPSA id 5b1f17b1804b1-431bd947a9fsm74208035e9.22.2024.10.31.17.59.29 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Thu, 31 Oct 2024 17:59:30 -0700 (PDT) From: Alexey Klimov To: linux-sound@vger.kernel.org, srinivas.kandagatla@linaro.org, broonie@kernel.org Cc: lgirdwood@gmail.com, robh@kernel.org, krzk+dt@kernel.org, conor+dt@kernel.org, andersson@kernel.org, konradybcio@kernel.org, perex@perex.cz, tiwai@suse.com, linux-arm-msm@vger.kernel.org, devicetree@vger.kernel.org, dmitry.baryshkov@linaro.org, krzysztof.kozlowski@linaro.org, caleb.connolly@linaro.org, linux-kernel@vger.kernel.org, a39.skl@gmail.com Subject: [PATCH v4 3/5] arm64: dts: qcom: sm6115: add LPASS LPI pin controller Date: Fri, 1 Nov 2024 00:59:23 +0000 Message-ID: <20241101005925.186696-4-alexey.klimov@linaro.org> X-Mailer: git-send-email 2.45.2 In-Reply-To: <20241101005925.186696-1-alexey.klimov@linaro.org> References: <20241101005925.186696-1-alexey.klimov@linaro.org> Precedence: bulk X-Mailing-List: linux-sound@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Add the Low Power Audio SubSystem Low Power Island (LPASS LPI) pin controller device node required for audio subsystem on Qualcomm QRB4210 RB2. Cc: Srinivas Kandagatla Signed-off-by: Alexey Klimov --- arch/arm64/boot/dts/qcom/sm6115.dtsi | 15 +++++++++++++++ 1 file changed, 15 insertions(+) diff --git a/arch/arm64/boot/dts/qcom/sm6115.dtsi b/arch/arm64/boot/dts/qcom/sm6115.dtsi index 816b8331933d..df2241237b26 100644 --- a/arch/arm64/boot/dts/qcom/sm6115.dtsi +++ b/arch/arm64/boot/dts/qcom/sm6115.dtsi @@ -16,6 +16,7 @@ #include #include #include +#include #include / { @@ -810,6 +811,20 @@ data-pins { }; }; + lpass_tlmm: pinctrl@a7c0000 { + compatible = "qcom,sm6115-lpass-lpi-pinctrl"; + reg = <0x0 0x0a7c0000 0x0 0x20000>, + <0x0 0x0a950000 0x0 0x10000>; + + clocks = <&q6afecc LPASS_HW_DCODEC_VOTE LPASS_CLK_ATTRIBUTE_COUPLE_NO>; + clock-names = "audio"; + + gpio-controller; + #gpio-cells = <2>; + gpio-ranges = <&lpass_tlmm 0 0 19>; + + }; + gcc: clock-controller@1400000 { compatible = "qcom,gcc-sm6115"; reg = <0x0 0x01400000 0x0 0x1f0000>;