@@ -60,6 +60,8 @@
#define ACP_SDW0_STAT BIT(21)
#define ACP_SDW1_STAT BIT(2)
+#define ACP_SDW0_HOST_WAKE_STAT BIT(24)
+#define ACP_SDW1_HOST_WAKE_STAT BIT(25)
#define ACP_SDW0_PME_STAT BIT(26)
#define ACP_SDW1_PME_STAT BIT(27)
#define ACP_ERROR_IRQ BIT(29)
@@ -169,6 +169,22 @@ static irqreturn_t acp70_irq_handler(int irq, void *dev_id)
irq_flag = 1;
}
+ if (ext_intr_stat1 & ACP_SDW0_HOST_WAKE_STAT) {
+ writel(ACP_SDW0_HOST_WAKE_STAT, adata->acp70_base + ACP_EXTERNAL_INTR_STAT1);
+ amd_manager = dev_get_drvdata(&adata->sdw->pdev[0]->dev);
+ if (amd_manager)
+ pm_request_resume(amd_manager->dev);
+ irq_flag = 1;
+ }
+
+ if (ext_intr_stat1 & ACP_SDW1_HOST_WAKE_STAT) {
+ writel(ACP_SDW1_HOST_WAKE_STAT, adata->acp70_base + ACP_EXTERNAL_INTR_STAT1);
+ amd_manager = dev_get_drvdata(&adata->sdw->pdev[1]->dev);
+ if (amd_manager)
+ pm_request_resume(amd_manager->dev);
+ irq_flag = 1;
+ }
+
if (ext_intr_stat & BIT(PDM_DMA_STAT)) {
ps_pdm_data = dev_get_drvdata(&adata->pdm_dev->dev);
writel(BIT(PDM_DMA_STAT), adata->acp70_base + ACP_EXTERNAL_INTR_STAT);
When ACP is in D0 state and SoundWire manager instance is in D3 state, If SoundWire wake event is asserted, Soundwire host wake interrupt will be triggered for that SoundWire manager instance. In this case, ACP PCI driver should clear the host wake interrupt and queue up the runtime resume of the SoundWire manager instance. Add code to handle SoundWire host wake interrupt in ACP7.0 interrupt handler. Signed-off-by: Vijendar Mukunda <Vijendar.Mukunda@amd.com> --- sound/soc/amd/acp70/acp70.h | 2 ++ sound/soc/amd/acp70/pci-acp70.c | 16 ++++++++++++++++ 2 files changed, 18 insertions(+)