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Thu, 18 Dec 2014 16:38:04 +0000 Date: Thu, 18 Dec 2014 16:37:51 +0000 (UTC) From: Aurelien Bouin To: "patch@alsa-project.org" , "alsa-devel@alsa-project.org" Message-ID: <302670613.333771.1418920671738.JavaMail.yahoo@jws11119.mail.ir2.yahoo.com> MIME-Version: 1.0 Cc: Nicolin Chen , Mark Brown , Fabio Estevam Subject: [alsa-devel] [PATCH v2] ASoC: fsl_esai: Fix ESAI_xCCR_xDC_WIDTH definition X-BeenThere: alsa-devel@alsa-project.org X-Mailman-Version: 2.1.14 Precedence: list Reply-To: Aurelien Bouin List-Id: "Alsa-devel mailing list for ALSA developers - http://www.alsa-project.org" List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: alsa-devel-bounces@alsa-project.org Sender: alsa-devel-bounces@alsa-project.org X-Virus-Scanned: ClamAV using ClamSMTP From 9bcae891b8fe7a42cbc2cd88319f7bd4ab44d012 Mon Sep 17 00:00:00 2001 From: Aurelien BOUIN Date: Thu, 18 Dec 2014 15:14:53 +0100 Subject: [PATCH 1/1] According to the mx6 reference manual the TDC and RDC field of registers ESAI_TCCR and ESAI_RCCR have a width of 5 bits, not 4 Signed-off-by: Aurelien BOUIN diff --git a/sound/soc/fsl/fsl_esai.h b/sound/soc/fsl/fsl_esai.h index 91a550f..5e793bb 100644 --- a/sound/soc/fsl/fsl_esai.h +++ b/sound/soc/fsl/fsl_esai.h @@ -302,7 +302,7 @@ #define ESAI_xCCR_xFP_MASK (((1 << ESAI_xCCR_xFP_WIDTH) - 1) << ESAI_xCCR_xFP_SHIFT) #define ESAI_xCCR_xFP(v) ((((v) - 1) << ESAI_xCCR_xFP_SHIFT) & ESAI_xCCR_xFP_MASK) #define ESAI_xCCR_xDC_SHIFT 9 -#define ESAI_xCCR_xDC_WIDTH 4 +#define ESAI_xCCR_xDC_WIDTH 5 #define ESAI_xCCR_xDC_MASK (((1 << ESAI_xCCR_xDC_WIDTH) - 1) << ESAI_xCCR_xDC_SHIFT) #define ESAI_xCCR_xDC(v) ((((v) - 1) << ESAI_xCCR_xDC_SHIFT) & ESAI_xCCR_xDC_MASK) #define ESAI_xCCR_xPSR_SHIFT 8