diff mbox

[4/4] ASoC: da7213: Improve 32KHz mode PLL locking

Message ID 497bb3724104ba16dc3588287f6071f0b7cce09e.1470318378.git.Adam.Thomson.Opensource@diasemi.com (mailing list archive)
State New, archived
Headers show

Commit Message

Adam Thomson Aug. 4, 2016, 2:35 p.m. UTC 
To aid PLL in locking on to a 32KHz MCLK, some register mods
are made during PLL configuration, and when enabling the DAI,
to achieve the full range of sample rates.

Signed-off-by: Adam Thomson <Adam.Thomson.Opensource@diasemi.com>
---
 sound/soc/codecs/da7213.c | 25 ++++++++++++++++++++++++-
 1 file changed, 24 insertions(+), 1 deletion(-)

--
1.9.3

Comments

Peter Meerwald-Stadler Aug. 5, 2016, 9:04 a.m. UTC | #1 
> To aid PLL in locking on to a 32KHz MCLK, some register mods
> are made during PLL configuration, and when enabling the DAI,
> to achieve the full range of sample rates.

thanks for the patch series; we are about to test...

some comments below
 
> Signed-off-by: Adam Thomson <Adam.Thomson.Opensource@diasemi.com>
> ---
>  sound/soc/codecs/da7213.c | 25 ++++++++++++++++++++++++-
>  1 file changed, 24 insertions(+), 1 deletion(-)
> 
> diff --git a/sound/soc/codecs/da7213.c b/sound/soc/codecs/da7213.c
> index 79b8324..095fe40 100644
> --- a/sound/soc/codecs/da7213.c
> +++ b/sound/soc/codecs/da7213.c
> @@ -750,11 +750,18 @@ static int da7213_dai_event(struct snd_soc_dapm_widget *w,
>  		snd_soc_update_bits(codec, DA7213_PC_COUNT,
>  				    DA7213_PC_FREERUN_MASK, 0);
> 
> -		/* Slave mode, if SRM not enabled no need for status checks */
> +		/* If SRM not enabled then nothing more to do */
>  		pll_ctrl = snd_soc_read(codec, DA7213_PLL_CTRL);
>  		if (!(pll_ctrl & DA7213_PLL_SRM_EN))
>  			return 0;
> 
> +		/* Assist 32KHz mode PLL lock */
> +		if (pll_ctrl & DA7213_PLL_32K_MODE) {

these registers cannot not found in the datasheet;
maybe add descriptive #defines in da7213.h

> +			snd_soc_write(codec, 0xF0, 0x8B);
> +			snd_soc_write(codec, 0xF2, 0x03);
> +			snd_soc_write(codec, 0xF0, 0x00);
> +		}
> +
>  		/* Check SRM has locked */
>  		do {
>  			pll_status = snd_soc_read(codec, DA7213_PLL_STATUS);
> @@ -771,6 +778,14 @@ static int da7213_dai_event(struct snd_soc_dapm_widget *w,
> 
>  		return 0;
>  	case SND_SOC_DAPM_POST_PMD:
> +		/* Revert 32KHz PLL lock udpates if applied previously */
> +		pll_ctrl = snd_soc_read(codec, DA7213_PLL_CTRL);
> +		if (pll_ctrl & DA7213_PLL_32K_MODE) {
> +			snd_soc_write(codec, 0xF0, 0x8B);
> +			snd_soc_write(codec, 0xF2, 0x01);
> +			snd_soc_write(codec, 0xF0, 0x00);
> +		}
> +
>  		/* PC free-running */
>  		snd_soc_update_bits(codec, DA7213_PC_COUNT,
>  				    DA7213_PC_FREERUN_MASK,
> @@ -1428,6 +1443,14 @@ static int da7213_set_dai_pll(struct snd_soc_dai *codec_dai, int pll_id,
>  			    DA7213_PLL_INDIV_MASK | DA7213_PLL_MODE_MASK,
>  			    pll_ctrl);
> 
> +	/* Assist 32KHz mode PLL lock */
> +	if (source == DA7213_SYSCLK_PLL_32KHZ) {
> +		snd_soc_write(codec, 0xF0, 0x8B);
> +		snd_soc_write(codec, 0xF1, 0x03);
> +		snd_soc_write(codec, 0xF1, 0x01);
> +		snd_soc_write(codec, 0xF0, 0x00);
> +	}
> +
>  	return 0;
>  }
Mark Brown Aug. 5, 2016, 10:30 a.m. UTC | #2 
On Fri, Aug 05, 2016 at 11:04:51AM +0200, Peter Meerwald-Stadler wrote:

> these registers cannot not found in the datasheet;
> maybe add descriptive #defines in da7213.h

> > +			snd_soc_write(codec, 0xF0, 0x8B);
> > +			snd_soc_write(codec, 0xF2, 0x03);
> > +			snd_soc_write(codec, 0xF0, 0x00);

It is very common for chips to have undocumented write sequences that
make tweaks based on test registers that are deliberately not
documented.  This looks like such a case, I'd imagine that register 0xf0
is a test key and 0xf2 contains a value being tweaked.
diff mbox

Patch

diff --git a/sound/soc/codecs/da7213.c b/sound/soc/codecs/da7213.c
index 79b8324..095fe40 100644
--- a/sound/soc/codecs/da7213.c
+++ b/sound/soc/codecs/da7213.c
@@ -750,11 +750,18 @@  static int da7213_dai_event(struct snd_soc_dapm_widget *w,
 		snd_soc_update_bits(codec, DA7213_PC_COUNT,
 				    DA7213_PC_FREERUN_MASK, 0);

-		/* Slave mode, if SRM not enabled no need for status checks */
+		/* If SRM not enabled then nothing more to do */
 		pll_ctrl = snd_soc_read(codec, DA7213_PLL_CTRL);
 		if (!(pll_ctrl & DA7213_PLL_SRM_EN))
 			return 0;

+		/* Assist 32KHz mode PLL lock */
+		if (pll_ctrl & DA7213_PLL_32K_MODE) {
+			snd_soc_write(codec, 0xF0, 0x8B);
+			snd_soc_write(codec, 0xF2, 0x03);
+			snd_soc_write(codec, 0xF0, 0x00);
+		}
+
 		/* Check SRM has locked */
 		do {
 			pll_status = snd_soc_read(codec, DA7213_PLL_STATUS);
@@ -771,6 +778,14 @@  static int da7213_dai_event(struct snd_soc_dapm_widget *w,

 		return 0;
 	case SND_SOC_DAPM_POST_PMD:
+		/* Revert 32KHz PLL lock udpates if applied previously */
+		pll_ctrl = snd_soc_read(codec, DA7213_PLL_CTRL);
+		if (pll_ctrl & DA7213_PLL_32K_MODE) {
+			snd_soc_write(codec, 0xF0, 0x8B);
+			snd_soc_write(codec, 0xF2, 0x01);
+			snd_soc_write(codec, 0xF0, 0x00);
+		}
+
 		/* PC free-running */
 		snd_soc_update_bits(codec, DA7213_PC_COUNT,
 				    DA7213_PC_FREERUN_MASK,
@@ -1428,6 +1443,14 @@  static int da7213_set_dai_pll(struct snd_soc_dai *codec_dai, int pll_id,
 			    DA7213_PLL_INDIV_MASK | DA7213_PLL_MODE_MASK,
 			    pll_ctrl);

+	/* Assist 32KHz mode PLL lock */
+	if (source == DA7213_SYSCLK_PLL_32KHZ) {
+		snd_soc_write(codec, 0xF0, 0x8B);
+		snd_soc_write(codec, 0xF1, 0x03);
+		snd_soc_write(codec, 0xF1, 0x01);
+		snd_soc_write(codec, 0xF0, 0x00);
+	}
+
 	return 0;
 }