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[RESEND,2/4] ASoC: fsl_esai: Only bypass sck_div for EXTAL source

Message ID 6c6ffc8939e15e4942f8b45a8a779d6cc16b72d4.1399366227.git.Guangyu.Chen@freescale.com (mailing list archive)
State Accepted
Commit 57ebbcafab0ce8cce4493c6a243ecdd7066e6ef1
Headers show

Commit Message

Nicolin Chen May 6, 2014, 8:56 a.m. UTC
ESAI can only output EXTAL clock source directly. But for FSYS clock source,
ESAI can not output it without getting through PSR PM dividers.

So this patch adds an extra check in the code.

Signed-off-by: Nicolin Chen <Guangyu.Chen@freescale.com>
---
 sound/soc/fsl/fsl_esai.c | 8 +++++++-
 1 file changed, 7 insertions(+), 1 deletion(-)
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Patch

diff --git a/sound/soc/fsl/fsl_esai.c b/sound/soc/fsl/fsl_esai.c
index d098a48..7e1916e 100644
--- a/sound/soc/fsl/fsl_esai.c
+++ b/sound/soc/fsl/fsl_esai.c
@@ -259,10 +259,16 @@  static int fsl_esai_set_dai_sysclk(struct snd_soc_dai *dai, int clk_id,
 		return -EINVAL;
 	}
 
-	if (ratio == 1) {
+	/* Only EXTAL source can be output directly without using PSR and PM */
+	if (ratio == 1 && clksrc == esai_priv->extalclk) {
 		/* Bypass all the dividers if not being needed */
 		ecr |= tx ? ESAI_ECR_ETO : ESAI_ECR_ERO;
 		goto out;
+	} else if (ratio < 2) {
+		/* The ratio should be no less than 2 if using other sources */
+		dev_err(dai->dev, "failed to derive required HCK%c rate\n",
+				tx ? 'T' : 'R');
+		return -EINVAL;
 	}
 
 	ret = fsl_esai_divisor_cal(dai, tx, ratio, false, 0);