| Message ID | 7b40da78c965d4152c15794ec527c75198c9e2f9.1447997800.git.shengjiu.wang@freescale.com (mailing list archive) |
|---|---|
| State | New, archived |
| Headers | show |
On Fri, Nov 20, 2015 at 02:17:53PM +0800, Shengjiu Wang wrote: > ASRC need to enable the spba clock, when sdma is using share peripheral > script. In this case, there is two spba master port is used, if don't > enable the clock, the spba bus will have arbitration issue, which may > cause read/write wrong data from/to ASRC registers > > Signed-off-by: Shengjiu Wang <shengjiu.wang@freescale.com> > --- > Documentation/devicetree/bindings/sound/fsl,asrc.txt | 2 ++ > sound/soc/fsl/fsl_asrc.c | 10 ++++++++++ > sound/soc/fsl/fsl_asrc.h | 1 + > 3 files changed, 13 insertions(+) > > diff --git a/Documentation/devicetree/bindings/sound/fsl,asrc.txt b/Documentation/devicetree/bindings/sound/fsl,asrc.txt > index b93362a..d8eeee3 100644 > --- a/Documentation/devicetree/bindings/sound/fsl,asrc.txt > +++ b/Documentation/devicetree/bindings/sound/fsl,asrc.txt > @@ -25,6 +25,8 @@ Required properties: > "mem" Peripheral access clock to access registers. > "ipg" Peripheral clock to driver module. > "asrck_<0-f>" Clock sources for input and output clock. > + "spba" The spba clock is needed when two spba master port > + is used. I'm assuming the same comments on patch 1 apply to all 3. Rob
On Fri, Nov 20, 2015 at 08:29:46AM -0600, Rob Herring wrote: > On Fri, Nov 20, 2015 at 02:17:53PM +0800, Shengjiu Wang wrote: > > ASRC need to enable the spba clock, when sdma is using share peripheral > > script. In this case, there is two spba master port is used, if don't > > enable the clock, the spba bus will have arbitration issue, which may > > cause read/write wrong data from/to ASRC registers > > > > Signed-off-by: Shengjiu Wang <shengjiu.wang@freescale.com> > > --- > > Documentation/devicetree/bindings/sound/fsl,asrc.txt | 2 ++ > > sound/soc/fsl/fsl_asrc.c | 10 ++++++++++ > > sound/soc/fsl/fsl_asrc.h | 1 + > > 3 files changed, 13 insertions(+) > > > > diff --git a/Documentation/devicetree/bindings/sound/fsl,asrc.txt b/Documentation/devicetree/bindings/sound/fsl,asrc.txt > > index b93362a..d8eeee3 100644 > > --- a/Documentation/devicetree/bindings/sound/fsl,asrc.txt > > +++ b/Documentation/devicetree/bindings/sound/fsl,asrc.txt > > @@ -25,6 +25,8 @@ Required properties: > > "mem" Peripheral access clock to access registers. > > "ipg" Peripheral clock to driver module. > > "asrck_<0-f>" Clock sources for input and output clock. > > + "spba" The spba clock is needed when two spba master port > > + is used. > > I'm assuming the same comments on patch 1 apply to all 3. Yes. I should have mentioned that. Nicolin
diff --git a/Documentation/devicetree/bindings/sound/fsl,asrc.txt b/Documentation/devicetree/bindings/sound/fsl,asrc.txt index b93362a..d8eeee3 100644 --- a/Documentation/devicetree/bindings/sound/fsl,asrc.txt +++ b/Documentation/devicetree/bindings/sound/fsl,asrc.txt @@ -25,6 +25,8 @@ Required properties: "mem" Peripheral access clock to access registers. "ipg" Peripheral clock to driver module. "asrck_<0-f>" Clock sources for input and output clock. + "spba" The spba clock is needed when two spba master port + is used. - big-endian : If this property is absent, the little endian mode will be in use as default. Otherwise, the big endian diff --git a/sound/soc/fsl/fsl_asrc.c b/sound/soc/fsl/fsl_asrc.c index 9f087d4..800828e 100644 --- a/sound/soc/fsl/fsl_asrc.c +++ b/sound/soc/fsl/fsl_asrc.c @@ -859,6 +859,10 @@ static int fsl_asrc_probe(struct platform_device *pdev) return PTR_ERR(asrc_priv->ipg_clk); } + asrc_priv->spba_clk = devm_clk_get(&pdev->dev, "spba"); + if (IS_ERR(asrc_priv->spba_clk)) + dev_warn(&pdev->dev, "failed to get spba clock\n"); + for (i = 0; i < ASRC_CLK_MAX_NUM; i++) { sprintf(tmp, "asrck_%x", i); asrc_priv->asrck_clk[i] = devm_clk_get(&pdev->dev, tmp); @@ -939,6 +943,9 @@ static int fsl_asrc_runtime_resume(struct device *dev) ret = clk_prepare_enable(asrc_priv->ipg_clk); if (ret) goto disable_mem_clk; + ret = clk_prepare_enable(asrc_priv->spba_clk); + if (ret) + goto disable_ipg_clk; for (i = 0; i < ASRC_CLK_MAX_NUM; i++) { ret = clk_prepare_enable(asrc_priv->asrck_clk[i]); if (ret) @@ -950,6 +957,8 @@ static int fsl_asrc_runtime_resume(struct device *dev) disable_asrck_clk: for (i--; i >= 0; i--) clk_disable_unprepare(asrc_priv->asrck_clk[i]); + clk_disable_unprepare(asrc_priv->spba_clk); +disable_ipg_clk: clk_disable_unprepare(asrc_priv->ipg_clk); disable_mem_clk: clk_disable_unprepare(asrc_priv->mem_clk); @@ -963,6 +972,7 @@ static int fsl_asrc_runtime_suspend(struct device *dev) for (i = 0; i < ASRC_CLK_MAX_NUM; i++) clk_disable_unprepare(asrc_priv->asrck_clk[i]); + clk_disable_unprepare(asrc_priv->spba_clk); clk_disable_unprepare(asrc_priv->ipg_clk); clk_disable_unprepare(asrc_priv->mem_clk); diff --git a/sound/soc/fsl/fsl_asrc.h b/sound/soc/fsl/fsl_asrc.h index 4aed63c..889080e 100644 --- a/sound/soc/fsl/fsl_asrc.h +++ b/sound/soc/fsl/fsl_asrc.h @@ -442,6 +442,7 @@ struct fsl_asrc { unsigned long paddr; struct clk *mem_clk; struct clk *ipg_clk; + struct clk *spba_clk; struct clk *asrck_clk[ASRC_CLK_MAX_NUM]; spinlock_t lock;
ASRC need to enable the spba clock, when sdma is using share peripheral script. In this case, there is two spba master port is used, if don't enable the clock, the spba bus will have arbitration issue, which may cause read/write wrong data from/to ASRC registers Signed-off-by: Shengjiu Wang <shengjiu.wang@freescale.com> --- Documentation/devicetree/bindings/sound/fsl,asrc.txt | 2 ++ sound/soc/fsl/fsl_asrc.c | 10 ++++++++++ sound/soc/fsl/fsl_asrc.h | 1 + 3 files changed, 13 insertions(+)