From patchwork Fri Aug 28 09:50:54 2015 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Christian Hartmann X-Patchwork-Id: 7090741 Return-Path: X-Original-To: patchwork-alsa-devel@patchwork.kernel.org Delivered-To: patchwork-parsemail@patchwork2.web.kernel.org Received: from mail.kernel.org (mail.kernel.org [198.145.29.136]) by patchwork2.web.kernel.org (Postfix) with ESMTP id C794CBEEC1 for ; Fri, 28 Aug 2015 09:51:18 +0000 (UTC) Received: from mail.kernel.org (localhost [127.0.0.1]) by mail.kernel.org (Postfix) with ESMTP id DE0492099B for ; Fri, 28 Aug 2015 09:51:17 +0000 (UTC) Received: from alsa0.perex.cz (alsa0.perex.cz [77.48.224.243]) by mail.kernel.org (Postfix) with ESMTP id 849632099A for ; Fri, 28 Aug 2015 09:51:16 +0000 (UTC) Received: by alsa0.perex.cz (Postfix, from userid 1000) id 96898260451; Fri, 28 Aug 2015 11:51:09 +0200 (CEST) X-Spam-Checker-Version: SpamAssassin 3.3.1 (2010-03-16) on mail.kernel.org X-Spam-Level: X-Spam-Status: No, score=-2.5 required=5.0 tests=BAYES_00, DKIM_ADSP_CUSTOM_MED, DKIM_SIGNED, FREEMAIL_FROM, NO_DNS_FOR_FROM, RCVD_IN_DNSWL_LOW, T_DKIM_INVALID, UNPARSEABLE_RELAY autolearn=unavailable version=3.3.1 Received: from alsa0.perex.cz (localhost [IPv6:::1]) by alsa0.perex.cz (Postfix) with ESMTP id 433EE260469; Fri, 28 Aug 2015 11:51:01 +0200 (CEST) X-Original-To: alsa-devel@alsa-project.org Delivered-To: alsa-devel@alsa-project.org Received: by alsa0.perex.cz (Postfix, from userid 1000) id DA6862604B0; Fri, 28 Aug 2015 11:50:59 +0200 (CEST) Received: from mail-wi0-f193.google.com (mail-wi0-f193.google.com [209.85.212.193]) by alsa0.perex.cz (Postfix) with ESMTP id CB482260451 for ; Fri, 28 Aug 2015 11:50:54 +0200 (CEST) Received: by wiyy7 with SMTP id y7so2833318wiy.0 for ; Fri, 28 Aug 2015 02:50:54 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=googlemail.com; s=20120113; h=mime-version:in-reply-to:references:date:message-id:subject:from:to :cc:content-type; bh=n5C8/BFwDBLXvSfZUApeovJeN39ZvSaTPsNHHrqJUwE=; b=gMaGuNqjXAr+zEih5Fa++vq4ep8QD/vOxTkHqLeO90mmZBCSIZiON5LioToysWmM3O yl4lUegIVsoA0RxUB9ClMsavWUOwkto8kpWGcoRZLc3+p3imOK58F7osMPc8pjzTvH+V U/A0EO4qb4s4uEcVfnfvl1s+9/7Aky9rih0dxvflATEhdmr071KuM4WetPeFn/eAlVRg KaAE1LwwJMUFCuUDnOX4cffNm0YgtuWSjsuOnolvMJYWZMHEMSbZtqkEjcNoRYo4rQau +3AwBATlSHFlOcO5zw5kssKXl50D58CSvVm/ePB2xrtkXSLWWCNoEtCOs7T2grc//6lM 7qgw== MIME-Version: 1.0 X-Received: by 10.194.250.40 with SMTP id yz8mr11110836wjc.37.1440755454469; Fri, 28 Aug 2015 02:50:54 -0700 (PDT) Received: by 10.28.157.75 with HTTP; Fri, 28 Aug 2015 02:50:54 -0700 (PDT) In-Reply-To: References: <20150821074310.GM30005@lahna.fi.intel.com> <20150824085140.GA5647@ck-lbox> <20150825062157.GB27431@sirena.org.uk> <20150826100155.GA1513@lahna.fi.intel.com> <20150827115914.GF28428@lahna.fi.intel.com> <20150827145614.GC5313@sirena.org.uk> Date: Fri, 28 Aug 2015 11:50:54 +0200 Message-ID: From: Christian Hartmann To: Charles Keepax Cc: alsa-devel@alsa-project.org, Robert Jarzmik , Pierre-Louis Bossart , Haojian Zhuang , linux-spi@vger.kernel.org, Mark Brown , jarkko.nikula@linux.intel.com, dan.carpenter@oracle.com, Mika Westerberg , Daniel Mack Subject: [alsa-devel] Fwd: Fwd: [PATCH 1/1] SPI : spi-pxa2xx : fix spi init of WM510205 codec via ACPI (resend) X-BeenThere: alsa-devel@alsa-project.org X-Mailman-Version: 2.1.14 Precedence: list List-Id: "Alsa-devel mailing list for ALSA developers - http://www.alsa-project.org" List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: alsa-devel-bounces@alsa-project.org Sender: alsa-devel-bounces@alsa-project.org X-Virus-Scanned: ClamAV using ClamSMTP Hi, this is a resend with all recipients in cc now ---------- Forwarded message ---------- From: Christian Hartmann Date: 2015-08-28 9:41 GMT+02:00 Subject: Re: [alsa-devel] Fwd: [PATCH 1/1] SPI : spi-pxa2xx : fix spi init of WM510205 codec via ACPI (resend) To: Mark Brown hi Mark et al., 2015-08-27 16:56 GMT+02:00 Mark Brown : > I can't see how that would work, the interrupt output isn't a GPIO. yes I think also that this is the GPIO pin number. I am not familiar with the interrupt handling, have again to look (in other drivers or similar), to understand how things should work, never done that before. I have added three dev_info() into spi-pxa2xx pxa2xx_spi_probe() to found out more whats wrong with the slave/master: commit 4b6ff73610deef478e53b958a02617f024bbef22 Author: Christian Hartmann Date: Thu Aug 27 14:51:48 2015 +0200 spi/spi-pxa2xx.c : added three new dev_infos, which prints irq, bus_num and num_chipselect Signed-off-by: Christian Hartmann and thats what I got: [ 6.182903] pxa2xx-spi 80860F0E:00: bus_num = -1 [ 6.182909] pxa2xx-spi 80860F0E:00: num_chipselect = 2 [ 6.182928] pxa2xx-spi 80860F0E:00: IRQ 194 [ 6.183049] pxa2xx-spi 80860F0E:00: no DMA channels available, using PIO [ 6.183111] pxa2xx-spi 80860F0E:00: registered master spi32766 (dynamic) [ 6.192761] spi spi-WM510205:00: 8333333 Hz actual, PIO .... the rest of the dmesg is currently the same.... Q: this thread is about the patch for the pxa2xx-spi where the num_chipselect was raised by one to so that the slave connects here at all. otherwise the cs1 >= max will be hit. Do you think the bus_number is ok ? And shouldn't it be set the cs1=0 and num_chipselect=1 ?? The DSDT has wrongly SPI=1 as chipselect, either the firmware (DSDT) must be updated or a correct patch enables the spi master/slave init here. I hope or expect that when the spi slave will be init correctly, that the device would also work. The ACPI stuff is already done here, and I am running out of time. In the last resort I have to give up or have to do that at night :) cheers chris diff --git a/drivers/spi/spi-pxa2xx.c b/drivers/spi/spi-pxa2xx.c index 6d795a5..cf02094 100644 --- a/drivers/spi/spi-pxa2xx.c +++ b/drivers/spi/spi-pxa2xx.c @@ -1389,6 +1389,9 @@ static int pxa2xx_spi_probe(struct platform_device *pdev) master->unprepare_transfer_hardware = pxa2xx_spi_unprepare_transfer; master->auto_runtime_pm = true; + dev_info(&pdev->dev, "bus_num = %d\n",master->bus_num); + dev_info(&pdev->dev, "num_chipselect = %d\n",master->num_chipselect); + drv_data->ssp_type = ssp->type; drv_data->null_dma_buf = (u32 *)PTR_ALIGN(&drv_data[1], DMA_ALIGNMENT); @@ -1423,6 +1426,8 @@ static int pxa2xx_spi_probe(struct platform_device *pdev) } + dev_info(&pdev->dev, "IRQ %d\n", ssp->irq); + /* Setup DMA if requested */ drv_data->tx_channel = -1; drv_data->rx_channel = -1;