Applied "ASoC: fsl_sai: fix Rx synchrounous mode" to the asoc tree

Commit Message

Mark Brown Oct. 26, 2015, 7:36 a.m. UTC

The patch

   ASoC: fsl_sai: fix Rx synchrounous mode

has been applied to the asoc tree at

   git://git.kernel.org/pub/scm/linux/kernel/git/broonie/sound.git 

All being well this means that it will be integrated into the linux-next
tree (usually sometime in the next 24 hours) and sent to Linus during
the next merge window (or sooner if it is a bug fix), however if
problems are discovered then the patch may be dropped or reverted.  

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Thanks,
Mark

From 3cc7780b6fc04318ab08d84f739503989200cf55 Mon Sep 17 00:00:00 2001
From: Stefan Agner <[e-mail]>
Date: Mon, 19 Oct 2015 17:42:23 -0700
Subject: [PATCH] ASoC: fsl_sai: fix Rx synchrounous mode

When using the Rx clock for both, transmitter and receiver, the
transmitter needs to be set to synchronous with receiver.

This reverts 855675f6e6a6 ("ASoC: fsl_sai: Set SYNC bit of TCR2 to
Asynchronous Mode"), which, judiging from the commit log, seems to
mixed up between the two synchronous modes: The boolean
sai->synchronous[TX] is indicating wheather the SAI should work in
Rx synchronous mode (sync Tx with Rx), hence if the value is true,
the SYNC field of TCR2 needs to be set to 0x1 ("Synchronous with
receiver").

Signed-off-by: Stefan Agner <[e-mail]>
Acked-by: Nicolin Chen <[e-mail]>
Signed-off-by: Mark Brown <[e-mail]>
---
 sound/soc/fsl/fsl_sai.c | 3 ++-
 1 file changed, 2 insertions(+), 1 deletion(-)

Patch

diff --git a/sound/soc/fsl/fsl_sai.c b/sound/soc/fsl/fsl_sai.c
index a18fd92..1f0e552 100644
--- a/sound/soc/fsl/fsl_sai.c
+++ b/sound/soc/fsl/fsl_sai.c
@@ -454,7 +454,8 @@  static int fsl_sai_trigger(struct snd_pcm_substream *substream, int cmd,
 	 * Rx sync with Tx clocks: Clear SYNC for Tx, set it for Rx.
 	 * Tx sync with Rx clocks: Clear SYNC for Rx, set it for Tx.
 	 */
-	regmap_update_bits(sai->regmap, FSL_SAI_TCR2, FSL_SAI_CR2_SYNC, 0);
+	regmap_update_bits(sai->regmap, FSL_SAI_TCR2, FSL_SAI_CR2_SYNC,
+		           sai->synchronous[TX] ? FSL_SAI_CR2_SYNC : 0);
 	regmap_update_bits(sai->regmap, FSL_SAI_RCR2, FSL_SAI_CR2_SYNC,
 			   sai->synchronous[RX] ? FSL_SAI_CR2_SYNC : 0);