From patchwork Tue May 29 14:59:42 2018 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Mark Brown X-Patchwork-Id: 10435903 Return-Path: Received: from mail.wl.linuxfoundation.org (pdx-wl-mail.web.codeaurora.org [172.30.200.125]) by pdx-korg-patchwork.web.codeaurora.org (Postfix) with ESMTP id 95A97601E9 for ; Tue, 29 May 2018 15:01:55 +0000 (UTC) Received: from mail.wl.linuxfoundation.org (localhost [127.0.0.1]) by mail.wl.linuxfoundation.org (Postfix) with ESMTP id 6B9282884E for ; Tue, 29 May 2018 15:01:55 +0000 (UTC) Received: by mail.wl.linuxfoundation.org (Postfix, from userid 486) id 67019288F9; Tue, 29 May 2018 15:01:55 +0000 (UTC) X-Spam-Checker-Version: SpamAssassin 3.3.1 (2010-03-16) on pdx-wl-mail.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-2.8 required=2.0 tests=BAYES_00,DKIM_SIGNED, MAILING_LIST_MULTI, RCVD_IN_DNSWL_NONE, T_DKIM_INVALID autolearn=unavailable version=3.3.1 Received: from alsa0.perex.cz (alsa0.perex.cz [77.48.224.243]) by mail.wl.linuxfoundation.org (Postfix) with ESMTP id D10F1289A9 for ; Tue, 29 May 2018 15:00:56 +0000 (UTC) Received: from alsa0.perex.cz (localhost [127.0.0.1]) by alsa0.perex.cz (Postfix) with ESMTP id 2A87326774A; Tue, 29 May 2018 17:00:01 +0200 (CEST) X-Original-To: alsa-devel@alsa-project.org Delivered-To: alsa-devel@alsa-project.org Received: by alsa0.perex.cz (Postfix, from userid 1000) id DFAAC267741; Tue, 29 May 2018 16:59:57 +0200 (CEST) Received: from heliosphere.sirena.org.uk (heliosphere.sirena.org.uk [172.104.155.198]) by alsa0.perex.cz (Postfix) with ESMTP id E6A33267737 for ; Tue, 29 May 2018 16:59:50 +0200 (CEST) DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=sirena.org.uk; s=20170815-heliosphere; h=Date:Message-Id:In-Reply-To: Subject:Cc:To:From:Sender:Reply-To:MIME-Version:Content-Type: Content-Transfer-Encoding:Content-ID:Content-Description:Resent-Date: Resent-From:Resent-Sender:Resent-To:Resent-Cc:Resent-Message-ID:References: List-Id:List-Help:List-Unsubscribe:List-Subscribe:List-Post:List-Owner: List-Archive; bh=Svbs6LG+Iy9qxCaYeeD6FMJ9LKnCa8cAufdCqUe65rE=; b=Z1nJTlMnIM1B v0O8QBt9Dfs9b5dhtQkUEzSuCf+gBkCj5WYpfVNSi8yHMQJ4o4JxHJx/rK+kTrUtWwNECNRWE5rjp fJWIvw5qSynx7Ssu3u+2i+ZBqL4mrVKIBId7Ea7RasiR7a5gk2IF5G9K9SE5YOjdm7xVg3A15nl1L HRYNA=; Received: from debutante.sirena.org.uk ([2001:470:1f1d:6b5::3] helo=debutante) by heliosphere.sirena.org.uk with esmtpsa (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.89) (envelope-from ) id 1fNg6B-0005bw-52; Tue, 29 May 2018 14:59:43 +0000 Received: from broonie by debutante with local (Exim 4.91) (envelope-from ) id 1fNg6A-00069N-NV; Tue, 29 May 2018 15:59:42 +0100 From: Mark Brown To: Agrawal@sirena.org.uk, Akshu In-Reply-To: <1527479306-12658-1-git-send-email-akshu.agrawal@amd.com> Message-Id: Date: Tue, 29 May 2018 15:59:42 +0100 Cc: , alsa-devel@alsa-project.org, Liam Girdwood , Takashi Iwai , open list , djkurtz@chromium.org, akshu.agrawal@amd.com, Mark Brown , "Mukunda, , Vijendar" , Alex Deucher , Guenter Roeck Subject: [alsa-devel] Applied "ASoC: AMD: make channel 1 dma as circular" to the asoc tree X-BeenThere: alsa-devel@alsa-project.org X-Mailman-Version: 2.1.14 Precedence: list List-Id: "Alsa-devel mailing list for ALSA developers - http://www.alsa-project.org" List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , MIME-Version: 1.0 Errors-To: alsa-devel-bounces@alsa-project.org Sender: alsa-devel-bounces@alsa-project.org X-Virus-Scanned: ClamAV using ClamSMTP The patch ASoC: AMD: make channel 1 dma as circular has been applied to the asoc tree at https://git.kernel.org/pub/scm/linux/kernel/git/broonie/sound.git All being well this means that it will be integrated into the linux-next tree (usually sometime in the next 24 hours) and sent to Linus during the next merge window (or sooner if it is a bug fix), however if problems are discovered then the patch may be dropped or reverted. You may get further e-mails resulting from automated or manual testing and review of the tree, please engage with people reporting problems and send followup patches addressing any issues that are reported if needed. If any updates are required or you are submitting further changes they should be sent as incremental updates against current git, existing patches will not be replaced. Please add any relevant lists and maintainers to the CCs when replying to this mail. Thanks, Mark From 6b116dfb4633a7efce7f96355c2d272d8b16f0fb Mon Sep 17 00:00:00 2001 From: "Agrawal, Akshu" Date: Mon, 28 May 2018 11:48:22 +0800 Subject: [PATCH] ASoC: AMD: make channel 1 dma as circular channel 1: SYSMEM<->ACP channel 2: ACP<->I2S Instead of waiting on period interrupt of ch 2 and then starting dma on ch1, we make ch1 dma as circular. This removes dependency of period granularity on hw pointer. Signed-off-by: Akshu Agrawal Reviewed-by: Daniel Kurtz Tested-by: Daniel Kurtz Signed-off-by: Mark Brown --- sound/soc/amd/acp-pcm-dma.c | 74 +++++-------------------------------- 1 file changed, 10 insertions(+), 64 deletions(-) diff --git a/sound/soc/amd/acp-pcm-dma.c b/sound/soc/amd/acp-pcm-dma.c index ac32deaa9541..77203841c535 100644 --- a/sound/soc/amd/acp-pcm-dma.c +++ b/sound/soc/amd/acp-pcm-dma.c @@ -337,8 +337,7 @@ static void config_acp_dma(void __iomem *acp_mmio, } /* Start a given DMA channel transfer */ -static void acp_dma_start(void __iomem *acp_mmio, - u16 ch_num, bool is_circular) +static void acp_dma_start(void __iomem *acp_mmio, u16 ch_num) { u32 dma_ctrl; @@ -369,11 +368,8 @@ static void acp_dma_start(void __iomem *acp_mmio, break; } - /* enable for ACP SRAM to/from I2S DMA channel */ - if (is_circular == true) - dma_ctrl |= ACP_DMA_CNTL_0__Circular_DMA_En_MASK; - else - dma_ctrl &= ~ACP_DMA_CNTL_0__Circular_DMA_En_MASK; + /* circular for both DMA channel */ + dma_ctrl |= ACP_DMA_CNTL_0__Circular_DMA_En_MASK; acp_reg_write(dma_ctrl, acp_mmio, mmACP_DMA_CNTL_0 + ch_num); } @@ -617,7 +613,6 @@ static int acp_deinit(void __iomem *acp_mmio) /* ACP DMA irq handler routine for playback, capture usecases */ static irqreturn_t dma_irq_handler(int irq, void *arg) { - u16 dscr_idx; u32 intr_flag, ext_intr_status; struct audio_drv_data *irq_data; void __iomem *acp_mmio; @@ -634,33 +629,13 @@ static irqreturn_t dma_irq_handler(int irq, void *arg) if ((intr_flag & BIT(ACP_TO_I2S_DMA_CH_NUM)) != 0) { valid_irq = true; - if (acp_reg_read(acp_mmio, mmACP_DMA_CUR_DSCR_13) == - PLAYBACK_START_DMA_DESCR_CH13) - dscr_idx = PLAYBACK_END_DMA_DESCR_CH12; - else - dscr_idx = PLAYBACK_START_DMA_DESCR_CH12; - config_acp_dma_channel(acp_mmio, SYSRAM_TO_ACP_CH_NUM, dscr_idx, - 1, 0); - acp_dma_start(acp_mmio, SYSRAM_TO_ACP_CH_NUM, false); - snd_pcm_period_elapsed(irq_data->play_i2ssp_stream); - acp_reg_write((intr_flag & BIT(ACP_TO_I2S_DMA_CH_NUM)) << 16, acp_mmio, mmACP_EXTERNAL_INTR_STAT); } if ((intr_flag & BIT(ACP_TO_I2S_DMA_BT_INSTANCE_CH_NUM)) != 0) { valid_irq = true; - if (acp_reg_read(acp_mmio, mmACP_DMA_CUR_DSCR_9) == - PLAYBACK_START_DMA_DESCR_CH9) - dscr_idx = PLAYBACK_END_DMA_DESCR_CH8; - else - dscr_idx = PLAYBACK_START_DMA_DESCR_CH8; - config_acp_dma_channel(acp_mmio, - SYSRAM_TO_ACP_BT_INSTANCE_CH_NUM, - dscr_idx, 1, 0); - acp_dma_start(acp_mmio, SYSRAM_TO_ACP_BT_INSTANCE_CH_NUM, - false); snd_pcm_period_elapsed(irq_data->play_i2sbt_stream); acp_reg_write((intr_flag & BIT(ACP_TO_I2S_DMA_BT_INSTANCE_CH_NUM)) << 16, @@ -669,38 +644,20 @@ static irqreturn_t dma_irq_handler(int irq, void *arg) if ((intr_flag & BIT(I2S_TO_ACP_DMA_CH_NUM)) != 0) { valid_irq = true; - if (acp_reg_read(acp_mmio, mmACP_DMA_CUR_DSCR_15) == - CAPTURE_START_DMA_DESCR_CH15) - dscr_idx = CAPTURE_END_DMA_DESCR_CH14; - else - dscr_idx = CAPTURE_START_DMA_DESCR_CH14; - config_acp_dma_channel(acp_mmio, ACP_TO_SYSRAM_CH_NUM, dscr_idx, - 1, 0); - acp_dma_start(acp_mmio, ACP_TO_SYSRAM_CH_NUM, false); - + snd_pcm_period_elapsed(irq_data->capture_i2ssp_stream); acp_reg_write((intr_flag & BIT(I2S_TO_ACP_DMA_CH_NUM)) << 16, acp_mmio, mmACP_EXTERNAL_INTR_STAT); } if ((intr_flag & BIT(ACP_TO_SYSRAM_CH_NUM)) != 0) { valid_irq = true; - snd_pcm_period_elapsed(irq_data->capture_i2ssp_stream); acp_reg_write((intr_flag & BIT(ACP_TO_SYSRAM_CH_NUM)) << 16, acp_mmio, mmACP_EXTERNAL_INTR_STAT); } if ((intr_flag & BIT(I2S_TO_ACP_DMA_BT_INSTANCE_CH_NUM)) != 0) { valid_irq = true; - if (acp_reg_read(acp_mmio, mmACP_DMA_CUR_DSCR_11) == - CAPTURE_START_DMA_DESCR_CH11) - dscr_idx = CAPTURE_END_DMA_DESCR_CH10; - else - dscr_idx = CAPTURE_START_DMA_DESCR_CH10; - config_acp_dma_channel(acp_mmio, - ACP_TO_SYSRAM_BT_INSTANCE_CH_NUM, - dscr_idx, 1, 0); - acp_dma_start(acp_mmio, ACP_TO_SYSRAM_BT_INSTANCE_CH_NUM, - false); + snd_pcm_period_elapsed(irq_data->capture_i2sbt_stream); acp_reg_write((intr_flag & BIT(I2S_TO_ACP_DMA_BT_INSTANCE_CH_NUM)) << 16, acp_mmio, mmACP_EXTERNAL_INTR_STAT); @@ -708,7 +665,6 @@ static irqreturn_t dma_irq_handler(int irq, void *arg) if ((intr_flag & BIT(ACP_TO_SYSRAM_BT_INSTANCE_CH_NUM)) != 0) { valid_irq = true; - snd_pcm_period_elapsed(irq_data->capture_i2sbt_stream); acp_reg_write((intr_flag & BIT(ACP_TO_SYSRAM_BT_INSTANCE_CH_NUM)) << 16, acp_mmio, mmACP_EXTERNAL_INTR_STAT); @@ -1015,14 +971,10 @@ static int acp_dma_prepare(struct snd_pcm_substream *substream) static int acp_dma_trigger(struct snd_pcm_substream *substream, int cmd) { int ret; - u32 loops = 4000; u64 bytescount = 0; struct snd_pcm_runtime *runtime = substream->runtime; - struct snd_soc_pcm_runtime *prtd = substream->private_data; struct audio_substream_data *rtd = runtime->private_data; - struct snd_soc_component *component = snd_soc_rtdcom_lookup(prtd, - DRV_NAME); if (!rtd) return -EINVAL; @@ -1034,18 +986,12 @@ static int acp_dma_trigger(struct snd_pcm_substream *substream, int cmd) if (rtd->bytescount == 0) rtd->bytescount = bytescount; if (substream->stream == SNDRV_PCM_STREAM_PLAYBACK) { - acp_dma_start(rtd->acp_mmio, rtd->ch1, false); - while (acp_reg_read(rtd->acp_mmio, mmACP_DMA_CH_STS) & - BIT(rtd->ch1)) { - if (!loops--) { - dev_err(component->dev, - "acp dma start timeout\n"); - return -ETIMEDOUT; - } - cpu_relax(); - } + acp_dma_start(rtd->acp_mmio, rtd->ch1); + acp_dma_start(rtd->acp_mmio, rtd->ch2); + } else { + acp_dma_start(rtd->acp_mmio, rtd->ch2); + acp_dma_start(rtd->acp_mmio, rtd->ch1); } - acp_dma_start(rtd->acp_mmio, rtd->ch2, true); ret = 0; break; case SNDRV_PCM_TRIGGER_STOP: