From patchwork Mon Oct 20 13:45:23 2014 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Peter Rosin X-Patchwork-Id: 5105871 Return-Path: X-Original-To: patchwork-alsa-devel@patchwork.kernel.org Delivered-To: patchwork-parsemail@patchwork2.web.kernel.org Received: from mail.kernel.org (mail.kernel.org [198.145.19.201]) by patchwork2.web.kernel.org (Postfix) with ESMTP id 170F8C11AC for ; Mon, 20 Oct 2014 13:51:39 +0000 (UTC) Received: from mail.kernel.org (localhost [127.0.0.1]) by mail.kernel.org (Postfix) with ESMTP id 79577201F7 for ; Mon, 20 Oct 2014 13:51:33 +0000 (UTC) Received: from alsa0.perex.cz (alsa0.perex.cz [77.48.224.243]) by mail.kernel.org (Postfix) with ESMTP id 4498D201F2 for ; Mon, 20 Oct 2014 13:51:31 +0000 (UTC) Received: by alsa0.perex.cz (Postfix, from userid 1000) id 92BC5261552; Mon, 20 Oct 2014 15:51:22 +0200 (CEST) X-Spam-Checker-Version: SpamAssassin 3.3.1 (2010-03-16) on mail.kernel.org X-Spam-Level: X-Spam-Status: No, score=-1.9 required=5.0 tests=BAYES_00, RCVD_IN_DNSWL_NONE, UNPARSEABLE_RELAY autolearn=unavailable version=3.3.1 Received: from alsa0.perex.cz (localhost [IPv6:::1]) by alsa0.perex.cz (Postfix) with ESMTP id 83B2F26148F; Mon, 20 Oct 2014 15:49:01 +0200 (CEST) X-Original-To: alsa-devel@alsa-project.org Delivered-To: alsa-devel@alsa-project.org Received: by alsa0.perex.cz (Postfix, from userid 1000) id 577C326085C; Mon, 20 Oct 2014 15:48:59 +0200 (CEST) Received: from EMAIL.axentia.se (axentia.se [87.96.186.132]) by alsa0.perex.cz (Postfix) with ESMTP id DDB5026149B for ; Mon, 20 Oct 2014 15:47:16 +0200 (CEST) Received: from EMAIL.axentia.se (192.168.2.5) by EMAIL.axentia.se (192.168.2.5) with Microsoft SMTP Server (TLS) id 15.0.775.38; Mon, 20 Oct 2014 15:45:24 +0200 Received: from EMAIL.axentia.se ([fe80::5810:5f52:e9e0:1395]) by EMAIL.axentia.se ([fe80::5810:5f52:e9e0:1395%10]) with mapi id 15.00.0775.031; Mon, 20 Oct 2014 15:45:24 +0200 From: Peter Rosin To: Peter Rosin , Bo Shen , "Liam Girdwood" , Mark Brown , "Jaroslav Kysela" , Takashi Iwai , "'alsa-devel@alsa-project.org'" , "linux-kernel@vger.kernel.org" Thread-Topic: [PATCH] ASoC: atmel_ssc_dai: Track playback and capture CMR dividers separately. Thread-Index: Ac/saz/Ebhtl/6cSQtuv8Muf3bNWIg== Date: Mon, 20 Oct 2014 13:45:23 +0000 Message-ID: Accept-Language: en-US, sv-SE Content-Language: sv-SE X-MS-Has-Attach: X-MS-TNEF-Correlator: x-originating-ip: [217.210.101.82] x-gfi-smtp-submission: 1 x-gfi-smtp-hellodomain: EMAIL.axentia.se x-gfi-smtp-remoteip: 192.168.2.5 MIME-Version: 1.0 Subject: [alsa-devel] [PATCH] ASoC: atmel_ssc_dai: Track playback and capture CMR dividers separately. X-BeenThere: alsa-devel@alsa-project.org X-Mailman-Version: 2.1.14 Precedence: list List-Id: "Alsa-devel mailing list for ALSA developers - http://www.alsa-project.org" List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: alsa-devel-bounces@alsa-project.org Sender: alsa-devel-bounces@alsa-project.org X-Virus-Scanned: ClamAV using ClamSMTP From 1e5621d7b9887c648d1a66238dc82d715c1e2cad Mon Sep 17 00:00:00 2001 From: Peter Rosin Date: Mon, 20 Oct 2014 14:38:04 +0200 Subject: [PATCH] ASoC: atmel_ssc_dai: Track playback and capture CMR dividers separately. The CMR divider register is shared by playback and capture. The SSC driver therefore tries to enforce rules so that the needed register content do not conflict during simultaneous playback/capture. However, the implementation also prevents changing the register content in a half-duplex scenario, which is needed when changing sample rates. Thus, keep track of the desired playback and capture clock dividers separately, and allow changing rates without closing the stream. Signed-off-by: Peter Rosin --- sound/soc/atmel/atmel_ssc_dai.c | 31 ++++++++++++++++++++++--------- sound/soc/atmel/atmel_ssc_dai.h | 10 ++++++---- 2 files changed, 28 insertions(+), 13 deletions(-) diff --git a/sound/soc/atmel/atmel_ssc_dai.c b/sound/soc/atmel/atmel_ssc_dai.c index f403f39..fec14fb 100644 --- a/sound/soc/atmel/atmel_ssc_dai.c +++ b/sound/soc/atmel/atmel_ssc_dai.c @@ -277,7 +277,8 @@ static void atmel_ssc_shutdown(struct snd_pcm_substream *substream, /* Reset the SSC */ ssc_writel(ssc_p->ssc->regs, CR, SSC_BIT(CR_SWRST)); /* Clear the SSC dividers */ - ssc_p->cmr_div = ssc_p->tcmr_period = ssc_p->rcmr_period = 0; + ssc_p->tcmr_div = ssc_p->rcmr_div = 0; + ssc_p->tcmr_period = ssc_p->rcmr_period = 0; } spin_unlock_irq(&ssc_p->lock); } @@ -304,17 +305,27 @@ static int atmel_ssc_set_dai_clkdiv(struct snd_soc_dai *cpu_dai, struct atmel_ssc_info *ssc_p = &ssc_info[cpu_dai->id]; switch (div_id) { - case ATMEL_SSC_CMR_DIV: + case ATMEL_SSC_TCMR_DIV: /* * The same master clock divider is used for both * transmit and receive, so if a value has already - * been set, it must match this value. + * been set for the other direction, it must match + * this value. */ - if (ssc_p->cmr_div == 0) - ssc_p->cmr_div = div; - else - if (div != ssc_p->cmr_div) - return -EBUSY; + if (ssc_p->rcmr_div == 0) + ssc_p->tcmr_div = div; + else if (div != ssc_p->rcmr_div) + return -EBUSY; + break; + + case ATMEL_SSC_RCMR_DIV: + /* + * See ATMEL_SSC_TCMR_DIV. + */ + if (ssc_p->tcmr_div == 0) + ssc_p->rcmr_div = div; + else if (div != ssc_p->tcmr_div) + return -EBUSY; break; case ATMEL_SSC_TCMR_PERIOD: @@ -345,6 +356,7 @@ static int atmel_ssc_hw_params(struct snd_pcm_substream *substream, struct atmel_pcm_dma_params *dma_params; int dir, channels, bits; u32 tfmr, rfmr, tcmr, rcmr; + u16 cmr; int start_event; int ret; int fslen, fslen_ext; @@ -626,7 +638,8 @@ static int atmel_ssc_hw_params(struct snd_pcm_substream *substream, } /* set SSC clock mode register */ - ssc_writel(ssc_p->ssc->regs, CMR, ssc_p->cmr_div); + cmr = ssc_p->tcmr_div ? ssc_p->tcmr_div : ssc_p->rcmr_div; + ssc_writel(ssc_p->ssc->regs, CMR, cmr); /* set receive clock mode and format */ ssc_writel(ssc_p->ssc->regs, RCMR, rcmr); diff --git a/sound/soc/atmel/atmel_ssc_dai.h b/sound/soc/atmel/atmel_ssc_dai.h index b1f08d5..a25df7a 100644 --- a/sound/soc/atmel/atmel_ssc_dai.h +++ b/sound/soc/atmel/atmel_ssc_dai.h @@ -39,9 +39,10 @@ #define ATMEL_SYSCLK_MCK 0 /* SSC uses AT91 MCK as system clock */ /* SSC divider ids */ -#define ATMEL_SSC_CMR_DIV 0 /* MCK divider for BCLK */ -#define ATMEL_SSC_TCMR_PERIOD 1 /* BCLK divider for transmit FS */ -#define ATMEL_SSC_RCMR_PERIOD 2 /* BCLK divider for receive FS */ +#define ATMEL_SSC_TCMR_DIV 0 /* MCK divider for transmit BCLK */ +#define ATMEL_SSC_RCMR_DIV 1 /* MCK divider for receive BCLK */ +#define ATMEL_SSC_TCMR_PERIOD 2 /* BCLK divider for transmit FS */ +#define ATMEL_SSC_RCMR_PERIOD 3 /* BCLK divider for receive FS */ /* * SSC direction masks */ @@ -110,7 +111,8 @@ struct atmel_ssc_info { unsigned short dir_mask; /* 0=unused, 1=playback, 2=capture */ unsigned short initialized; /* true if SSC has been initialized */ unsigned short daifmt; - unsigned short cmr_div; + unsigned short tcmr_div; + unsigned short rcmr_div; unsigned short tcmr_period; unsigned short rcmr_period; struct atmel_pcm_dma_params *dma_params[2];