| Message ID | ec66399502514edbb1de3cf9bff08b1d@realtek.com (mailing list archive) |
|---|---|
| State | Superseded |
| Commit | 6bdd75a1f6f552ecfb0afd6f544b022b2d34c56a |
| Headers | show |
| Series | ASoC: rt1015: modify calibration sequence for better performance | expand |
Hi Mark, Could you please help review below patch? Thanks a lot! Regards, Jack -----Original Message----- From: Jack Yu Sent: Tuesday, December 22, 2020 11:15 AM To: broonie@kernel.org; lgirdwood@gmail.com Cc: alsa-devel@alsa-project.org; lars@metafoo.de; flove@realtek.com; kenny_chen@realtek.com; kent_chen@realtek.com; oder_chiou@realtek.com; shumingf@realtek.com; derek.fang@realtek.com; jack.yu@realtek.com Subject: [PATCH] ASoC: rt1015: modify calibration sequence for better performance New calibration sequence to fix power issue in idle state. Signed-off-by: Jack Yu <jack.yu@realtek.com> --- sound/soc/codecs/rt1015.c | 40 ++++++++++----------------------------- 1 file changed, 10 insertions(+), 30 deletions(-) diff --git a/sound/soc/codecs/rt1015.c b/sound/soc/codecs/rt1015.c index 32e6bcf763d1..5fdf7bbfd375 100644 --- a/sound/soc/codecs/rt1015.c +++ b/sound/soc/codecs/rt1015.c @@ -497,40 +497,20 @@ static void rt1015_calibrate(struct rt1015_priv *rt1015) snd_soc_dapm_mutex_lock(&component->dapm); regcache_cache_bypass(regmap, true); - regmap_write(regmap, RT1015_PWR9, 0xAA60); - regmap_write(regmap, RT1015_PWR_STATE_CTRL, 0x0089); - regmap_write(regmap, RT1015_PWR_STATE_CTRL, 0x008A); - regmap_write(regmap, RT1015_PWR_STATE_CTRL, 0x008C); - regmap_write(regmap, RT1015_PWR_STATE_CTRL, 0x008D); - regmap_write(regmap, RT1015_PWR4, 0x80B2); - regmap_write(regmap, RT1015_CLASSD_SEQ, 0x5797); - regmap_write(regmap, RT1015_CLSD_INTERNAL8, 0x2100); - regmap_write(regmap, RT1015_CLSD_INTERNAL9, 0x0100); - regmap_write(regmap, RT1015_PWR5, 0x2175); - regmap_write(regmap, RT1015_MIXER1, 0x005D); - regmap_write(regmap, RT1015_CLSD_INTERNAL1, 0x00A1); - regmap_write(regmap, RT1015_CLSD_INTERNAL2, 0x12F7); - regmap_write(regmap, RT1015_DC_CALIB_CLSD1, 0x1205); - msleep(200); - regmap_write(regmap, RT1015_CLSD_INTERNAL8, 0x2000); - regmap_write(regmap, RT1015_CLSD_INTERNAL9, 0x0180); - regmap_write(regmap, RT1015_CLSD_INTERNAL1, 0x00A1); - regmap_write(regmap, RT1015_DC_CALIB_CLSD1, 0x0A05); - msleep(200); + regmap_write(regmap, RT1015_CLK_DET, 0x0000); regmap_write(regmap, RT1015_PWR4, 0x00B2); + regmap_write(regmap, RT1015_PWR_STATE_CTRL, 0x0009); + msleep(100); + regmap_write(regmap, RT1015_PWR_STATE_CTRL, 0x000A); + msleep(100); + regmap_write(regmap, RT1015_PWR_STATE_CTRL, 0x000C); + msleep(100); regmap_write(regmap, RT1015_CLSD_INTERNAL8, 0x2028); regmap_write(regmap, RT1015_CLSD_INTERNAL9, 0x0140); - regmap_write(regmap, RT1015_PWR5, 0x0175); - regmap_write(regmap, RT1015_CLSD_INTERNAL1, 0x1721); - regmap_write(regmap, RT1015_CLASSD_SEQ, 0x570E); - regmap_write(regmap, RT1015_MIXER1, 0x203D); - regmap_write(regmap, RT1015_DC_CALIB_CLSD1, 0x5A01); - regmap_write(regmap, RT1015_CLSD_INTERNAL2, 0x12FF); - regmap_write(regmap, RT1015_GAT_BOOST, 0x0eFE); - regmap_write(regmap, RT1015_PWR_STATE_CTRL, 0x008E); - regmap_write(regmap, RT1015_PWR_STATE_CTRL, 0x0088); + regmap_write(regmap, RT1015_PWR_STATE_CTRL, 0x000D); + msleep(300); + regmap_write(regmap, RT1015_PWR_STATE_CTRL, 0x0008); regmap_write(regmap, RT1015_SYS_RST1, 0x05F5); - regmap_write(regmap, RT1015_SYS_RST2, 0x0b9a); regcache_cache_bypass(regmap, false); regcache_mark_dirty(regmap); -- 2.29.0
On Fri, Jan 01, 2021 at 01:50:49PM +0000, Jack Yu wrote: > Hi Mark, > > Could you please help review below patch? > Thanks a lot! Please don't send content free pings and please allow a reasonable time for review. People get busy, go on holiday, attend conferences and so on so unless there is some reason for urgency (like critical bug fixes) please allow at least a couple of weeks for review. If there have been review comments then people may be waiting for those to be addressed. Sending content free pings adds to the mail volume (if they are seen at all) which is often the problem and since they can't be reviewed directly if something has gone wrong you'll have to resend the patches anyway, so sending again is generally a better approach though there are some other maintainers who like them - if in doubt look at how patches for the subsystem are normally handled.
diff --git a/sound/soc/codecs/rt1015.c b/sound/soc/codecs/rt1015.c index 32e6bcf763d1..5fdf7bbfd375 100644 --- a/sound/soc/codecs/rt1015.c +++ b/sound/soc/codecs/rt1015.c @@ -497,40 +497,20 @@ static void rt1015_calibrate(struct rt1015_priv *rt1015) snd_soc_dapm_mutex_lock(&component->dapm); regcache_cache_bypass(regmap, true); - regmap_write(regmap, RT1015_PWR9, 0xAA60); - regmap_write(regmap, RT1015_PWR_STATE_CTRL, 0x0089); - regmap_write(regmap, RT1015_PWR_STATE_CTRL, 0x008A); - regmap_write(regmap, RT1015_PWR_STATE_CTRL, 0x008C); - regmap_write(regmap, RT1015_PWR_STATE_CTRL, 0x008D); - regmap_write(regmap, RT1015_PWR4, 0x80B2); - regmap_write(regmap, RT1015_CLASSD_SEQ, 0x5797); - regmap_write(regmap, RT1015_CLSD_INTERNAL8, 0x2100); - regmap_write(regmap, RT1015_CLSD_INTERNAL9, 0x0100); - regmap_write(regmap, RT1015_PWR5, 0x2175); - regmap_write(regmap, RT1015_MIXER1, 0x005D); - regmap_write(regmap, RT1015_CLSD_INTERNAL1, 0x00A1); - regmap_write(regmap, RT1015_CLSD_INTERNAL2, 0x12F7); - regmap_write(regmap, RT1015_DC_CALIB_CLSD1, 0x1205); - msleep(200); - regmap_write(regmap, RT1015_CLSD_INTERNAL8, 0x2000); - regmap_write(regmap, RT1015_CLSD_INTERNAL9, 0x0180); - regmap_write(regmap, RT1015_CLSD_INTERNAL1, 0x00A1); - regmap_write(regmap, RT1015_DC_CALIB_CLSD1, 0x0A05); - msleep(200); + regmap_write(regmap, RT1015_CLK_DET, 0x0000); regmap_write(regmap, RT1015_PWR4, 0x00B2); + regmap_write(regmap, RT1015_PWR_STATE_CTRL, 0x0009); + msleep(100); + regmap_write(regmap, RT1015_PWR_STATE_CTRL, 0x000A); + msleep(100); + regmap_write(regmap, RT1015_PWR_STATE_CTRL, 0x000C); + msleep(100); regmap_write(regmap, RT1015_CLSD_INTERNAL8, 0x2028); regmap_write(regmap, RT1015_CLSD_INTERNAL9, 0x0140); - regmap_write(regmap, RT1015_PWR5, 0x0175); - regmap_write(regmap, RT1015_CLSD_INTERNAL1, 0x1721); - regmap_write(regmap, RT1015_CLASSD_SEQ, 0x570E); - regmap_write(regmap, RT1015_MIXER1, 0x203D); - regmap_write(regmap, RT1015_DC_CALIB_CLSD1, 0x5A01); - regmap_write(regmap, RT1015_CLSD_INTERNAL2, 0x12FF); - regmap_write(regmap, RT1015_GAT_BOOST, 0x0eFE); - regmap_write(regmap, RT1015_PWR_STATE_CTRL, 0x008E); - regmap_write(regmap, RT1015_PWR_STATE_CTRL, 0x0088); + regmap_write(regmap, RT1015_PWR_STATE_CTRL, 0x000D); + msleep(300); + regmap_write(regmap, RT1015_PWR_STATE_CTRL, 0x0008); regmap_write(regmap, RT1015_SYS_RST1, 0x05F5); - regmap_write(regmap, RT1015_SYS_RST2, 0x0b9a); regcache_cache_bypass(regmap, false); regcache_mark_dirty(regmap);
New calibration sequence to fix power issue in idle state. Signed-off-by: Jack Yu <jack.yu@realtek.com> --- sound/soc/codecs/rt1015.c | 40 ++++++++++----------------------------- 1 file changed, 10 insertions(+), 30 deletions(-)