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[v1,15/15] WIP: arm64: dts: qcom: qrb5165-rb5: add bus-pwrseq property to pcie0

Message ID 20211006035407.1147909-16-dmitry.baryshkov@linaro.org (mailing list archive)
State Handled Elsewhere
Delegated to: Luiz Von Dentz
Headers show
Series create power sequencing subsystem | expand

Checks

Context Check Description
tedd_an/checkpatch fail [v1,15/15] WIP: arm64: dts: qcom: qrb5165-rb5: add bus-pwrseq property to pcie0\WARNING:COMMIT_MESSAGE: Missing commit description - Add an appropriate one total: 0 errors, 1 warnings, 7 lines checked NOTE: For some of the reported defects, checkpatch may be able to mechanically convert to the typical style using --fix or --fix-inplace. /github/workspace/src/12538587.patch has style problems, please review. NOTE: Ignored message types: UNKNOWN_COMMIT_ID NOTE: If any of the errors are false positives, please report them to the maintainer, see CHECKPATCH in MAINTAINERS.
tedd_an/gitlint fail [v1,15/15] WIP: arm64: dts: qcom: qrb5165-rb5: add bus-pwrseq property to pcie0 1: T5 Title contains the word 'WIP' (case-insensitive): "[v1,15/15] WIP: arm64: dts: qcom: qrb5165-rb5: add bus-pwrseq property to pcie0"

Commit Message

Dmitry Baryshkov Oct. 6, 2021, 3:54 a.m. UTC 
Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org>
---
 arch/arm64/boot/dts/qcom/qrb5165-rb5.dts | 1 +
 1 file changed, 1 insertion(+)
diff mbox series

Patch

diff --git a/arch/arm64/boot/dts/qcom/qrb5165-rb5.dts b/arch/arm64/boot/dts/qcom/qrb5165-rb5.dts
index 326330f528fc..0c347cb6f8e0 100644
--- a/arch/arm64/boot/dts/qcom/qrb5165-rb5.dts
+++ b/arch/arm64/boot/dts/qcom/qrb5165-rb5.dts
@@ -689,6 +689,7 @@  wifi-therm@1 {
 
 &pcie0 {
 	status = "okay";
+	bus-pwrseq = <&qca_pwrseq 0>;
 };
 
 &pcie0_phy {