diff mbox series

[BlueZ,v2,4/5] shared/lc3: Add defines for BASE with multiple BISes

Message ID 20240625072711.7011-5-iulia.tanasescu@nxp.com (mailing list archive)
State Accepted
Commit 4571cdba13a3b915be6e87858a4138a6bd701771
Headers show
Series test-bap: Add Broadcast Source STR MBIS tests | expand

Checks

Context Check Description
tedd_an/pre-ci_am success Success
tedd_an/CheckPatch success CheckPatch PASS
tedd_an/GitLint success Gitlint PASS
tedd_an/IncrementalBuild success Incremental Build PASS

Commit Message

Iulia Tanasescu June 25, 2024, 7:27 a.m. UTC 
This adds defines for BASE configurations with multiple BISes.
---
 src/shared/lc3.h | 53 ++++++++++++++++++++++++++++++++++++++++++++++++
 1 file changed, 53 insertions(+)
diff mbox series

Patch

diff --git a/src/shared/lc3.h b/src/shared/lc3.h
index 944f574b0..e7a9277ec 100644
--- a/src/shared/lc3.h
+++ b/src/shared/lc3.h
@@ -425,6 +425,59 @@ 
 		0xFF, 0x00, 0x00, 0x00, 0x00, \
 		_cc, 0x00, 0x01, 0x00)
 
+#define BASE_LC3_8_1_MBIS \
+	BASE_LC3(40000, 1, 2, LC3_CFG_8_1, 0x00, 0x01, 0x00, 0x02, 0x00)
+
+#define BASE_LC3_8_2_MBIS \
+	BASE_LC3(40000, 1, 2, LC3_CFG_8_2, 0x00, 0x01, 0x00, 0x02, 0x00)
+
+#define BASE_LC3_16_1_MBIS \
+	BASE_LC3(40000, 1, 2, LC3_CFG_16_1, 0x00, 0x01, 0x00, 0x02, 0x00)
+
+#define BASE_LC3_16_2_MBIS \
+	BASE_LC3(40000, 1, 2, LC3_CFG_16_2, 0x00, 0x01, 0x00, 0x02, 0x00)
+
+#define BASE_LC3_24_1_MBIS \
+	BASE_LC3(40000, 1, 2, LC3_CFG_24_1, 0x00, 0x01, 0x00, 0x02, 0x00)
+
+#define BASE_LC3_24_2_MBIS \
+	BASE_LC3(40000, 1, 2, LC3_CFG_24_2, 0x00, 0x01, 0x00, 0x02, 0x00)
+
+#define BASE_LC3_32_1_MBIS \
+	BASE_LC3(40000, 1, 2, LC3_CFG_32_1, 0x00, 0x01, 0x00, 0x02, 0x00)
+
+#define BASE_LC3_32_2_MBIS \
+	BASE_LC3(40000, 1, 2, LC3_CFG_32_2, 0x00, 0x01, 0x00, 0x02, 0x00)
+
+#define BASE_LC3_44_1_MBIS \
+	BASE_LC3(40000, 1, 2, LC3_CFG_44_1, 0x00, 0x01, 0x00, 0x02, 0x00)
+
+#define BASE_LC3_44_2_MBIS \
+	BASE_LC3(40000, 1, 2, LC3_CFG_44_2, 0x00, 0x01, 0x00, 0x02, 0x00)
+
+#define BASE_LC3_48_1_MBIS \
+	BASE_LC3(40000, 1, 2, LC3_CFG_48_1, 0x00, 0x01, 0x00, 0x02, 0x00)
+
+#define BASE_LC3_48_2_MBIS \
+	BASE_LC3(40000, 1, 2, LC3_CFG_48_2, 0x00, 0x01, 0x00, 0x02, 0x00)
+
+#define BASE_LC3_48_3_MBIS \
+	BASE_LC3(40000, 1, 2, LC3_CFG_48_3, 0x00, 0x01, 0x00, 0x02, 0x00)
+
+#define BASE_LC3_48_4_MBIS \
+	BASE_LC3(40000, 1, 2, LC3_CFG_48_4, 0x00, 0x01, 0x00, 0x02, 0x00)
+
+#define BASE_LC3_48_5_MBIS \
+	BASE_LC3(40000, 1, 2, LC3_CFG_48_5, 0x00, 0x01, 0x00, 0x02, 0x00)
+
+#define BASE_LC3_48_6_MBIS \
+	BASE_LC3(40000, 1, 2, LC3_CFG_48_6, 0x00, 0x01, 0x00, 0x02, 0x00)
+
+#define BASE_VS_MBIS(_cc) \
+	BASE(40000, 1, 2, \
+		0xFF, 0x00, 0x00, 0x00, 0x00, \
+		_cc, 0x00, 0x01, 0x00, 0x02, 0x00)
+
 #define LC3_QOS_UNFRAMED	0x00
 #define LC3_QOS_FRAMED		0x01