| Message ID | 20231126192452.97824-1-dustin@howett.net (mailing list archive) |
|---|---|
| Headers | show |
| Series | platform/chrome: cros_ec_lpc: add support for AMD Framework Laptops | expand |
Hi Dustin, On 2023-11-26 13:24:48-0600, Dustin L. Howett wrote: > This patch series adds support for the AMD models of the Framework > Laptop (both 13" and 16"). > > These models of Framework Laptop have switched to an NPCX embedded > controller, which uses the original Chrome EC linear memory-mapped I/O > model. > > However, these devices are not configured in a way that is compatible > with the cros_ec driver. Instead of mapping EC memory to I/O ports > [0x900, 0x9FF], they map it to ports [0xE00, 0xEFF]. Furthermore, the > ACPI node for the embedded controller incorrectly indicates that it does > not use port 0x8FF for host commands. It does use port 0x8FF. Do you know if this incompatibility is intended, a technical necessity and/or possible to be fixed upstream? > To address these issues without impacting cros_ec_lpcs' compatibility > with Chromebook/Chromebox devices or the existing Framework Laptop > platform, these patches add DMI match-specific driver data through > which we can detect per-machine "quirks". > > Quirks toggle changes in cros_ec_lpcs' behavior, such as remapping the > memory MMIO window and reserving I/O ports differently. > > Changes in v2: > * Separated Framework Laptop (Intel) and Framework Laptop (AMD) > * dev_warn has been demoted to dev_info > * Style fixes > * Reworded the individual patch bodies for clarity and style > > Dustin L. Howett (4): > platform/chrome: cros_ec_lpc: introduce a priv struct for the lpc > device > platform/chrome: cros_ec_lpc: pass driver_data from DMI to the device > platform/chrome: cros_ec_lpc: add a "quirks" system > platform/chrome: cros_ec_lpc: add quirks for the Framework Laptop > (AMD) > > drivers/platform/chrome/cros_ec_lpc.c | 94 ++++++++++++++++++++++++--- > 1 file changed, 86 insertions(+), 8 deletions(-)
This patch series adds support for the AMD models of the Framework Laptop (both 13" and 16"). These models of Framework Laptop have switched to an NPCX embedded controller, which uses the original Chrome EC linear memory-mapped I/O model. However, these devices are not configured in a way that is compatible with the cros_ec driver. Instead of mapping EC memory to I/O ports [0x900, 0x9FF], they map it to ports [0xE00, 0xEFF]. Furthermore, the ACPI node for the embedded controller incorrectly indicates that it does not use port 0x8FF for host commands. It does use port 0x8FF. To address these issues without impacting cros_ec_lpcs' compatibility with Chromebook/Chromebox devices or the existing Framework Laptop platform, these patches add DMI match-specific driver data through which we can detect per-machine "quirks". Quirks toggle changes in cros_ec_lpcs' behavior, such as remapping the memory MMIO window and reserving I/O ports differently. Changes in v2: * Separated Framework Laptop (Intel) and Framework Laptop (AMD) * dev_warn has been demoted to dev_info * Style fixes * Reworded the individual patch bodies for clarity and style Dustin L. Howett (4): platform/chrome: cros_ec_lpc: introduce a priv struct for the lpc device platform/chrome: cros_ec_lpc: pass driver_data from DMI to the device platform/chrome: cros_ec_lpc: add a "quirks" system platform/chrome: cros_ec_lpc: add quirks for the Framework Laptop (AMD) drivers/platform/chrome/cros_ec_lpc.c | 94 ++++++++++++++++++++++++--- 1 file changed, 86 insertions(+), 8 deletions(-)