Message ID | 20220504170905.332415-10-ckeepax@opensource.cirrus.com (mailing list archive) |
---|---|
State | Handled Elsewhere |
Headers | show
Received: from mx0b-001ae601.pphosted.com (mx0a-001ae601.pphosted.com [67.231.149.25]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 83DC12F2E for <chrome-platform@lists.linux.dev>; Wed, 4 May 2022 17:23:45 +0000 (UTC) Received: from pps.filterd (m0077473.ppops.net [127.0.0.1]) by mx0a-001ae601.pphosted.com (8.17.1.5/8.17.1.5) with ESMTP id 2446CVq7001835; Wed, 4 May 2022 12:09:10 -0500 DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=cirrus.com; h=from : to : cc : subject : date : message-id : in-reply-to : references : mime-version : content-transfer-encoding : content-type; s=PODMain02222019; bh=JCe6amQAWCnxJOvlYKPpfidr5FUNWOY0+RWHhCPsa7g=; b=S60OLJuoeUASEqszEP3dasf6vqeSNDAuZxf/r4adw1D6KMXeH5UtAYFpZBvBwJcFwaGt mpxbr0qvgZjh4hkAouVVrjTrMFf/wxt0oXA8sZkavHK7xPWJ7RtahLj9JMaJpFuNkBGu +7+IySFNCWPtybnTTHy0D8ptqTysGqKMKGrMMI2xnYxtCEyK1LazLtjNkvvNUqboV9TP rvmZoURpzl0FPr5fvJVbnKvALwNm0r4ba9ovpn7HDESWaUuVp0UkpAYIShFFPEFo3xoc f0W+M+VOQYBCCNCfs10bcS2ldjj53Z6AXFRoJi+8+V8UOxZhEpnCVe4lead52dP7khRP HQ== Received: from ediex02.ad.cirrus.com ([84.19.233.68]) by mx0a-001ae601.pphosted.com (PPS) with ESMTPS id 3fs2h2d8fp-5 (version=TLSv1.2 cipher=ECDHE-RSA-AES128-GCM-SHA256 bits=128 verify=NOT); Wed, 04 May 2022 12:09:10 -0500 Received: from EDIEX01.ad.cirrus.com (198.61.84.80) by EDIEX02.ad.cirrus.com (198.61.84.81) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_128_GCM_SHA256) id 15.1.2375.24; Wed, 4 May 2022 18:09:05 +0100 Received: from ediswmail.ad.cirrus.com (198.61.86.93) by EDIEX01.ad.cirrus.com (198.61.84.80) with Microsoft SMTP Server id 15.1.2375.24 via Frontend Transport; Wed, 4 May 2022 18:09:05 +0100 Received: from algalon.ad.cirrus.com (algalon.ad.cirrus.com [198.90.251.122]) by ediswmail.ad.cirrus.com (Postfix) with ESMTP id B0151459; Wed, 4 May 2022 17:09:05 +0000 (UTC) From: Charles Keepax <ckeepax@opensource.cirrus.com> To: <broonie@kernel.org> CC: <lgirdwood@gmail.com>, <codrin.ciubotariu@microchip.com>, <lars@metafoo.de>, <cychiang@chromium.org>, <tzungbi@google.com>, <bleung@chromium.org>, <matthias.bgg@gmail.com>, <kmarinushkin@birdec.com>, <oder_chiou@realtek.com>, <steven.eckhoff.opensource@gmail.com>, <srinivas.kandagatla@linaro.org>, <alexandre.belloni@bootlin.com>, <kuninori.morimoto.gx@renesas.com>, <jiaxin.yu@mediatek.com>, <alsa-devel@alsa-project.org>, <chrome-platform@lists.linux.dev>, <linux-mediatek@lists.infradead.org>, <patches@opensource.cirrus.com> Subject: [PATCH 09/38] ASoC: sta350: Remove redundant big endian formats Date: Wed, 4 May 2022 18:08:36 +0100 Message-ID: <20220504170905.332415-10-ckeepax@opensource.cirrus.com> X-Mailer: git-send-email 2.30.2 In-Reply-To: <20220504170905.332415-1-ckeepax@opensource.cirrus.com> References: <20220504170905.332415-1-ckeepax@opensource.cirrus.com> Precedence: bulk X-Mailing-List: chrome-platform@lists.linux.dev List-Id: <chrome-platform.lists.linux.dev> List-Subscribe: <mailto:chrome-platform+subscribe@lists.linux.dev> List-Unsubscribe: <mailto:chrome-platform+unsubscribe@lists.linux.dev> MIME-Version: 1.0 Content-Transfer-Encoding: 8bit Content-Type: text/plain X-Proofpoint-ORIG-GUID: 15S9pbKhgPFLHBY0IcHRbcHCZxcP4LsX X-Proofpoint-GUID: 15S9pbKhgPFLHBY0IcHRbcHCZxcP4LsX X-Proofpoint-Spam-Reason: safe |
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Clean up usage of the endianness flag
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expand
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diff --git a/sound/soc/codecs/sta350.c b/sound/soc/codecs/sta350.c index 1fb370fc0ae38..9189fb3648f7d 100644 --- a/sound/soc/codecs/sta350.c +++ b/sound/soc/codecs/sta350.c @@ -48,12 +48,9 @@ SNDRV_PCM_RATE_192000) #define STA350_FORMATS \ - (SNDRV_PCM_FMTBIT_S16_LE | SNDRV_PCM_FMTBIT_S16_BE | \ - SNDRV_PCM_FMTBIT_S18_3LE | SNDRV_PCM_FMTBIT_S18_3BE | \ - SNDRV_PCM_FMTBIT_S20_3LE | SNDRV_PCM_FMTBIT_S20_3BE | \ - SNDRV_PCM_FMTBIT_S24_3LE | SNDRV_PCM_FMTBIT_S24_3BE | \ - SNDRV_PCM_FMTBIT_S24_LE | SNDRV_PCM_FMTBIT_S24_BE | \ - SNDRV_PCM_FMTBIT_S32_LE | SNDRV_PCM_FMTBIT_S32_BE) + (SNDRV_PCM_FMTBIT_S16_LE | SNDRV_PCM_FMTBIT_S18_3LE | \ + SNDRV_PCM_FMTBIT_S20_3LE | SNDRV_PCM_FMTBIT_S24_3LE | \ + SNDRV_PCM_FMTBIT_S24_LE | SNDRV_PCM_FMTBIT_S32_LE) /* Power-up register defaults */ static const struct reg_default sta350_regs[] = {
The CODEC already provides the endianness flag on its snd_soc_component_driver structure, specifying it is ambivalent to endian. The core will expand the formats to cover both endian types, as such remove the redundant specification of both endians. Signed-off-by: Charles Keepax <ckeepax@opensource.cirrus.com> --- sound/soc/codecs/sta350.c | 9 +++------ 1 file changed, 3 insertions(+), 6 deletions(-)