From patchwork Mon Jul 11 07:22:59 2022 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Prashant Malani X-Patchwork-Id: 12913026 Received: from mail-pg1-f169.google.com (mail-pg1-f169.google.com [209.85.215.169]) (using TLSv1.2 with cipher ECDHE-RSA-AES128-GCM-SHA256 (128/128 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 8CE641FB7 for ; Mon, 11 Jul 2022 07:27:37 +0000 (UTC) Received: by mail-pg1-f169.google.com with SMTP id o18so4017494pgu.9 for ; Mon, 11 Jul 2022 00:27:37 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=chromium.org; s=google; h=from:to:cc:subject:date:message-id:in-reply-to:references :mime-version:content-transfer-encoding; bh=ltR4ACK7cvdVqSLD7lT3OdzN4AnkmkLPklaRa89XJQM=; b=Pe/Jn/mOYQgAgyY9boCsCzaQh8QhJ1HQMNdF4UX+IR5rGs8Pl/1r9zwDF2BNWNdhx/ tRWcpu92DOeSf1exbLAkE1owKuifnx8Cxgp7kvqLpdMiZXx9rBizqH8dRtQ9xT5LrLhe AYblPA6frGhG+CS+o7GAzlTySapuCcrB2r0jI= X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20210112; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references:mime-version:content-transfer-encoding; bh=ltR4ACK7cvdVqSLD7lT3OdzN4AnkmkLPklaRa89XJQM=; b=EZ39clE8KbzUs1tbaBW1Ik8ktwJeGXz1L4XOCCS4zpITfJDqZLOTuT1yGzQ+BtFEpS 1ezxbxSCPBWpw/6dr/pj04vZO3379j4NvLexlqyAmY3KSUF62aeG02vhiQwvuYZzDhX5 3dUv3UOH1fZBBuQctktr5hY7uPxrM9nkekCHVMl3k9EPdSJ8sg7KgpcZg0BuXz7iJ/F3 PBrpKwYVghN9CGcUHfnZ7s9WC2INZYG28CLyOTaqgdybI+zpeyi7XywQLuKMcFGLiSo1 m3wrMY8M2vXmu+4pmZn95i22SivItnLWsKmyf6aQNWCVr87FBAes92jjZjFBDC2qlHGI ifjQ== X-Gm-Message-State: AJIora+RZcCEgLTTvoyii7wuDQ+71qDnkXlFonADvcNmjKys7B2ItMM1 AUgH1L6e3JmGCAywMt0r+sRvBQ== X-Google-Smtp-Source: AGRyM1sAX3lU1UhTYLRAmEnvbJ8kmdvvRlGBV4XwrAs1ppKD9Fwbxg+ZWeV+2k8AjBzGsN/gi3VaFA== X-Received: by 2002:a63:165c:0:b0:412:6f3a:1b4b with SMTP id 28-20020a63165c000000b004126f3a1b4bmr15220079pgw.98.1657524457024; Mon, 11 Jul 2022 00:27:37 -0700 (PDT) Received: from pmalani.c.googlers.com.com (157.214.185.35.bc.googleusercontent.com. [35.185.214.157]) by smtp.gmail.com with ESMTPSA id z8-20020aa79e48000000b0051bc5f4df1csm4012839pfq.154.2022.07.11.00.27.36 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Mon, 11 Jul 2022 00:27:36 -0700 (PDT) From: Prashant Malani To: linux-kernel@vger.kernel.org, linux-usb@vger.kernel.org, chrome-platform@lists.linux.dev Cc: bleung@chromium.org, heikki.krogerus@linux.intel.com, Prashant Malani , Daisuke Nojiri , "Dustin L. Howett" , Greg Kroah-Hartman , Guenter Roeck , "Gustavo A. R. Silva" , Kees Cook , Sebastian Reichel , Tzung-Bi Shih Subject: [PATCH v4 5/9] platform/chrome: cros_typec_switch: Set EC retimer Date: Mon, 11 Jul 2022 07:22:59 +0000 Message-Id: <20220711072333.2064341-6-pmalani@chromium.org> X-Mailer: git-send-email 2.37.0.144.g8ac04bfd2-goog In-Reply-To: <20220711072333.2064341-1-pmalani@chromium.org> References: <20220711072333.2064341-1-pmalani@chromium.org> Precedence: bulk X-Mailing-List: chrome-platform@lists.linux.dev List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Invoke Chrome EC host commands to set EC-controlled retimer switches to the state the Type-C framework instructs. Signed-off-by: Prashant Malani --- Changes since v3: - No changes. Changes since v2: - No changes. Changes since v1: - No changes. drivers/platform/chrome/cros_typec_switch.c | 56 ++++++++++++++++++++- 1 file changed, 55 insertions(+), 1 deletion(-) diff --git a/drivers/platform/chrome/cros_typec_switch.c b/drivers/platform/chrome/cros_typec_switch.c index 0d319e315d57..b50ecedce662 100644 --- a/drivers/platform/chrome/cros_typec_switch.c +++ b/drivers/platform/chrome/cros_typec_switch.c @@ -9,7 +9,10 @@ #include #include #include +#include #include +#include +#include #include #define DRV_NAME "cros-typec-switch" @@ -28,9 +31,60 @@ struct cros_typec_switch_data { struct cros_typec_port *ports[EC_USB_PD_MAX_PORTS]; }; +static int cros_typec_cmd_mux_set(struct cros_typec_switch_data *sdata, int port_num, u8 index, + u8 state) +{ + struct typec_usb_mux_set params = { + .mux_index = index, + .mux_flags = state, + }; + + struct ec_params_typec_control req = { + .port = port_num, + .command = TYPEC_CONTROL_COMMAND_USB_MUX_SET, + .mux_params = params, + }; + + return cros_ec_command(sdata->ec, 0, EC_CMD_TYPEC_CONTROL, &req, + sizeof(req), NULL, 0); +} + +static int cros_typec_get_mux_state(unsigned long mode, struct typec_altmode *alt) +{ + int ret = -EOPNOTSUPP; + + if (mode == TYPEC_STATE_SAFE) + ret = USB_PD_MUX_SAFE_MODE; + else if (mode == TYPEC_STATE_USB) + ret = USB_PD_MUX_USB_ENABLED; + else if (alt && alt->svid == USB_TYPEC_DP_SID) + ret = USB_PD_MUX_DP_ENABLED; + + return ret; +} + +/* + * The Chrome EC treats both mode-switches and retimers as "muxes" for the purposes of the + * host command API. This common function configures and verifies the retimer/mode-switch + * according to the provided setting. + */ +static int cros_typec_configure_mux(struct cros_typec_switch_data *sdata, int port_num, int index, + unsigned long mode, struct typec_altmode *alt) +{ + int ret = cros_typec_get_mux_state(mode, alt); + + if (ret < 0) + return ret; + + return cros_typec_cmd_mux_set(sdata, port_num, index, (u8)ret); +} + static int cros_typec_retimer_set(struct typec_retimer *retimer, struct typec_retimer_state *state) { - return 0; + struct cros_typec_port *port = typec_retimer_get_drvdata(retimer); + + /* Retimers have index 1. */ + return cros_typec_configure_mux(port->sdata, port->port_num, 1, state->mode, state->alt); } static void cros_typec_unregister_switches(struct cros_typec_switch_data *sdata)