From patchwork Sun Jul 17 17:44:48 2022 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Sam Ravnborg X-Patchwork-Id: 12920573 Received: from mailrelay4-1.pub.mailoutpod1-cph3.one.com (mailrelay4-1.pub.mailoutpod1-cph3.one.com [46.30.210.185]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 306BB257A for ; Sun, 17 Jul 2022 17:45:17 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=ravnborg.org; s=rsa1; h=content-transfer-encoding:mime-version:references:in-reply-to:message-id:date: subject:cc:to:from:from; bh=OH+7B1dv6A/IsRaDuE+rP9ZN0s2pjNrgOB/nzBGQAF4=; b=fWaLsgjbGnWlwD1onXdQrk08KNmgroH9ExsH4/Ift4sAngkj5dHZZeaU6aUso4nGiFWB4+XSXh5Ws pmqYAI4z6M60JDgostVEB+rl7FUJckPUEDUN4xhel4YIgWWOZWCGr35ofFTmCaR08iCoTw9THx9YCw o0pWj2Jn1T/2JB/U1HaFXekXWJ+0KhCkAZSle+lF/tVrfKXydHBJTLlSCx00y7cAJEM+6e7yAnJDMD qr2K5KY1vgubuZVeA2LpLDuOtJp3T4uMUh1PFVnGhn9FvOOtftDrivGqYMgcDsYeH0ldGOHyT95jDt qiDfcDerFT5tBGGxdEplvsJWhnJdOrA== DKIM-Signature: v=1; a=ed25519-sha256; c=relaxed/relaxed; d=ravnborg.org; s=ed1; h=content-transfer-encoding:mime-version:references:in-reply-to:message-id:date: subject:cc:to:from:from; bh=OH+7B1dv6A/IsRaDuE+rP9ZN0s2pjNrgOB/nzBGQAF4=; b=n2sJMNE96nAy24OFbfHMHie+x45T7Ns0ZQgtqjazvcJXj1t5lB0PGXZsCWOlRyX3uwu92NbAFY70O +S9MCToCw== X-HalOne-Cookie: 0b59a70e3f6c156b2b4c6740a14cbfe11b04ef81 X-HalOne-ID: 3677d553-05f8-11ed-823f-d0431ea8bb10 Received: from mailproxy1.cst.dirpod4-cph3.one.com (2-105-2-98-cable.dk.customer.tdc.net [2.105.2.98]) by mailrelay4.pub.mailoutpod1-cph3.one.com (Halon) with ESMTPSA id 3677d553-05f8-11ed-823f-d0431ea8bb10; Sun, 17 Jul 2022 17:45:14 +0000 (UTC) From: Sam Ravnborg To: dri-devel@lists.freedesktop.org, Andrzej Hajda , Neil Armstrong , Robert Foss , Laurent Pinchart , Jonas Karlman , Jernej Skrabec Cc: Arnd Bergmann , Benson Leung , Cai Huoqing , chrome-platform@lists.linux.dev, Chun-Kuang Hu , Dafna Hirschfeld , Daniel Vetter , David Airlie , Enric Balletbo i Serra , Guenter Roeck , Jitao Shi , Kieran Bingham , linux-arm-kernel@lists.infradead.org, linux-mediatek@lists.infradead.org, linux-renesas-soc@vger.kernel.org, Maarten Lankhorst , Matthias Brugger , Maxime Ripard , Philip Chen , Philipp Zabel , Sam Ravnborg , Thomas Zimmermann , Tomi Valkeinen , Laurent Pinchart Subject: [PATCH v1 06/12] drm/bridge: cros-ec-anx7688: Use drm_bridge_funcs.atomic_check Date: Sun, 17 Jul 2022 19:44:48 +0200 Message-Id: <20220717174454.46616-7-sam@ravnborg.org> X-Mailer: git-send-email 2.34.1 In-Reply-To: <20220717174454.46616-1-sam@ravnborg.org> References: <20220717174454.46616-1-sam@ravnborg.org> Precedence: bulk X-Mailing-List: chrome-platform@lists.linux.dev List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Replace the deprecated drm_bridge_funcs.mode_fixup() with drm_bridge_funcs.atomic_check(). drm_bridge_funcs.atomic_check() requires the atomic state operations, update these to the default implementations. Signed-off-by: Sam Ravnborg Cc: Andrzej Hajda Cc: Neil Armstrong Cc: Robert Foss Cc: Laurent Pinchart Cc: Jonas Karlman Cc: Jernej Skrabec Cc: Benson Leung Cc: Guenter Roeck Cc: chrome-platform@lists.linux.dev Reviewed-by: Dave Stevenson Reviewed-by: Laurent Pinchart --- drivers/gpu/drm/bridge/cros-ec-anx7688.c | 28 +++++++++++++++--------- 1 file changed, 18 insertions(+), 10 deletions(-) diff --git a/drivers/gpu/drm/bridge/cros-ec-anx7688.c b/drivers/gpu/drm/bridge/cros-ec-anx7688.c index 0f6d907432e3..fc19ea87926f 100644 --- a/drivers/gpu/drm/bridge/cros-ec-anx7688.c +++ b/drivers/gpu/drm/bridge/cros-ec-anx7688.c @@ -5,6 +5,7 @@ * Copyright 2020 Google LLC */ +#include #include #include #include @@ -45,9 +46,10 @@ bridge_to_cros_ec_anx7688(struct drm_bridge *bridge) return container_of(bridge, struct cros_ec_anx7688, bridge); } -static bool cros_ec_anx7688_bridge_mode_fixup(struct drm_bridge *bridge, - const struct drm_display_mode *mode, - struct drm_display_mode *adjusted_mode) +static int cros_ec_anx7688_bridge_atomic_check(struct drm_bridge *bridge, + struct drm_bridge_state *bridge_state, + struct drm_crtc_state *crtc_state, + struct drm_connector_state *conn_state) { struct cros_ec_anx7688 *anx = bridge_to_cros_ec_anx7688(bridge); int totalbw, requiredbw; @@ -56,13 +58,13 @@ static bool cros_ec_anx7688_bridge_mode_fixup(struct drm_bridge *bridge, int ret; if (!anx->filter) - return true; + return 0; /* Read both regs 0x85 (bandwidth) and 0x86 (lane count). */ ret = regmap_bulk_read(anx->regmap, ANX7688_DP_BANDWIDTH_REG, regs, 2); if (ret < 0) { DRM_ERROR("Failed to read bandwidth/lane count\n"); - return false; + return ret; } dpbw = regs[0]; lanecount = regs[1]; @@ -71,28 +73,34 @@ static bool cros_ec_anx7688_bridge_mode_fixup(struct drm_bridge *bridge, if (dpbw > 0x19 || lanecount > 2) { DRM_ERROR("Invalid bandwidth/lane count (%02x/%d)\n", dpbw, lanecount); - return false; + return -EINVAL; } /* Compute available bandwidth (kHz) */ totalbw = dpbw * lanecount * 270000 * 8 / 10; /* Required bandwidth (8 bpc, kHz) */ - requiredbw = mode->clock * 8 * 3; + requiredbw = crtc_state->mode.clock * 8 * 3; DRM_DEBUG_KMS("DP bandwidth: %d kHz (%02x/%d); mode requires %d Khz\n", totalbw, dpbw, lanecount, requiredbw); if (totalbw == 0) { DRM_ERROR("Bandwidth/lane count are 0, not rejecting modes\n"); - return true; + return 0; } - return totalbw >= requiredbw; + if (totalbw < requiredbw) + return -EINVAL; + + return 0; } static const struct drm_bridge_funcs cros_ec_anx7688_bridge_funcs = { - .mode_fixup = cros_ec_anx7688_bridge_mode_fixup, + .atomic_check = cros_ec_anx7688_bridge_atomic_check, + .atomic_duplicate_state = drm_atomic_helper_bridge_duplicate_state, + .atomic_destroy_state = drm_atomic_helper_bridge_destroy_state, + .atomic_reset = drm_atomic_helper_bridge_reset, }; static int cros_ec_anx7688_bridge_probe(struct i2c_client *client)