From patchwork Wed Oct 26 00:36:41 2022 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Stephen Boyd X-Patchwork-Id: 13020005 Received: from mail-pj1-f44.google.com (mail-pj1-f44.google.com [209.85.216.44]) (using TLSv1.2 with cipher ECDHE-RSA-AES128-GCM-SHA256 (128/128 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id C2F2AA52 for ; Wed, 26 Oct 2022 00:36:47 +0000 (UTC) Received: by mail-pj1-f44.google.com with SMTP id z5-20020a17090a8b8500b00210a3a2364fso2584884pjn.0 for ; Tue, 25 Oct 2022 17:36:47 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=chromium.org; s=google; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:from:to:cc:subject:date :message-id:reply-to; bh=7o9M7KU4VkIHlOlHu9OUDgP8BHNeP5A3lj7/KBP6MkM=; b=kFhmSao+3OKJQW3idOU2E/AVTPoknHK6CowE9bpV0senKL4UHeXg+Ap2hdTeBxiM8U j0ofHVR1SbI5TlYKqMazdfDpVGUC7DFoxrGyjVYn2Hjb6ZjzPm72B5+SvFv78TvPlRgZ CGDtw2fsGRx80b1UWZmJACMIjPtauam0QTrcQ= X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20210112; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:x-gm-message-state:from:to:cc :subject:date:message-id:reply-to; bh=7o9M7KU4VkIHlOlHu9OUDgP8BHNeP5A3lj7/KBP6MkM=; b=WHYACB0rmmU3r1sRt+0cCHjSCvbeiemToWOqshFQMFWTr+nSOnsCqQtJG1Zvbc4ODW Le9SkAj6GKp2LtpsI97Yrvd3KITfApsSURsJ4/ZLvyJdwdNd5hSnany+WXzL4QiYZJ3w 3CvvwwynTZIsGJ+JXF52C9b8vBSY8rV0IQJB8SM2xF/JKbv5j16o/NSlmU+S8gdqoQaw soCiJ1FgGJaKEjo67uL/+aMOWpPNaHT+0Q8vB/3TrN6nx4OJNoCC03+RoiDbWQsITK+x ztA28XiO5+oqiULBzBL/5M5Hc+lqP57Gh/XwmIS9gAJnsWqIGY/U3YTVk/YXojjtXFyc +XdA== X-Gm-Message-State: ACrzQf0cN/8nOPmwGt0P2dMDTyZx0Rdig75PvPfZoNfvYKXMghFi6R7l Nc6MQgu24RS/QVT3tW7VI21QEQ== X-Google-Smtp-Source: AMsMyM7/cm23zoDs3NnMPXi2JgJMk+3YKnEgib7FoJKI2NWceBzcR55vJo8kkhdx3yhRf89ohNjsxw== X-Received: by 2002:a17:902:b708:b0:184:3921:df30 with SMTP id d8-20020a170902b70800b001843921df30mr41796671pls.43.1666744607237; Tue, 25 Oct 2022 17:36:47 -0700 (PDT) Received: from smtp.gmail.com ([2620:15c:11a:201:c1b0:de11:3d5e:16c0]) by smtp.gmail.com with ESMTPSA id ik29-20020a170902ab1d00b001868ba9a867sm1717405plb.303.2022.10.25.17.36.45 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Tue, 25 Oct 2022 17:36:46 -0700 (PDT) From: Stephen Boyd To: Rob Herring , Krzysztof Kozlowski Cc: linux-kernel@vger.kernel.org, patches@lists.linux.dev, devicetree@vger.kernel.org, chrome-platform@lists.linux.dev, Guenter Roeck , Douglas Anderson , Craig Hesling , Tom Hughes , Alexandru M Stan , Tzung-Bi Shih , Matthias Kaehlcke , Benson Leung , Lee Jones Subject: [PATCH v7 2/2] dt-bindings: cros-ec: Add ChromeOS fingerprint binding Date: Tue, 25 Oct 2022 17:36:41 -0700 Message-Id: <20221026003641.2688765-3-swboyd@chromium.org> X-Mailer: git-send-email 2.38.1.273.g43a17bfeac-goog In-Reply-To: <20221026003641.2688765-1-swboyd@chromium.org> References: <20221026003641.2688765-1-swboyd@chromium.org> Precedence: bulk X-Mailing-List: chrome-platform@lists.linux.dev List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Add a binding to describe the fingerprint processor found on Chromebooks with a fingerprint sensor. Previously we've been describing this with the google,cros-ec-spi binding but it lacks gpio and regulator control used during firmware flashing. Cc: Rob Herring Cc: Krzysztof Kozlowski Cc: Cc: Cc: Guenter Roeck Cc: Douglas Anderson Cc: Craig Hesling Cc: Tom Hughes Cc: Alexandru M Stan Cc: Tzung-Bi Shih Cc: Matthias Kaehlcke Cc: Benson Leung Cc: Lee Jones Signed-off-by: Stephen Boyd Reviewed-by: Rob Herring --- .../bindings/mfd/google,cros-ec.yaml | 67 +++++++++++++++++++ 1 file changed, 67 insertions(+) diff --git a/Documentation/devicetree/bindings/mfd/google,cros-ec.yaml b/Documentation/devicetree/bindings/mfd/google,cros-ec.yaml index 659d3f64b550..3d5efa5578d1 100644 --- a/Documentation/devicetree/bindings/mfd/google,cros-ec.yaml +++ b/Documentation/devicetree/bindings/mfd/google,cros-ec.yaml @@ -25,6 +25,11 @@ properties: - description: For implementations of the EC connected through SPI. const: google,cros-ec-spi + - description: + For implementations of the FPMCU connected through SPI. + items: + - const: google,cros-ec-fp + - const: google,cros-ec-spi - description: For implementations of the EC connected through RPMSG. const: google,cros-ec-rpmsg @@ -67,6 +72,15 @@ properties: interrupts: maxItems: 1 + reset-gpios: + maxItems: 1 + + boot0-gpios: + maxItems: 1 + description: Assert for bootloader mode. + + vdd-supply: true + wakeup-source: description: Button can wake-up the system. @@ -177,6 +191,41 @@ allOf: - reg - interrupts + - if: + properties: + compatible: + contains: + const: google,cros-ec-fp + then: + properties: + '#address-cells': false + '#size-cells': false + typec: false + ec-pwm: false + kbd-led-backlight: false + keyboard-controller: false + proximity: false + codecs: false + cbas: false + + patternProperties: + "^i2c-tunnel[0-9]*$": false + "^regulator@[0-9]+$": false + "^extcon[0-9]*$": false + + # Using additionalProperties: false here and + # listing true properties doesn't work + + required: + - reset-gpios + - boot0-gpios + - vdd-supply + else: + properties: + reset-gpios: false + boot0-gpios: false + vdd-supply: false + additionalProperties: false examples: @@ -232,4 +281,22 @@ examples: compatible = "google,cros-ec-rpmsg"; }; }; + + # Example for FPMCU + - | + spi0 { + #address-cells = <0x1>; + #size-cells = <0x0>; + + ec@0 { + compatible = "google,cros-ec-fp", "google,cros-ec-spi"; + reg = <0x0>; + interrupt-parent = <&gpio_controller>; + interrupts = <4 IRQ_TYPE_LEVEL_LOW>; + spi-max-frequency = <3000000>; + reset-gpios = <&gpio_controller 5 GPIO_ACTIVE_LOW>; + boot0-gpios = <&gpio_controller 10 GPIO_ACTIVE_HIGH>; + vdd-supply = <&pp3300_fp_mcu>; + }; + }; ...