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[34.83.5.33]) by smtp.gmail.com with ESMTPSA id 68-20020a621947000000b00580e679dcf2sm6045566pfz.157.2022.12.27.16.56.40 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Tue, 27 Dec 2022 16:56:40 -0800 (PST) From: Prashant Malani To: linux-kernel@vger.kernel.org, chrome-platform@lists.linux.dev Cc: heikki.krogerus@linux.intel.com, Prashant Malani , Benson Leung , Daisuke Nojiri , "Dustin L. Howett" , Evan Green , Greg Kroah-Hartman , Guenter Roeck , "Gustavo A. R. Silva" , Kees Cook , Lee Jones , Lee Jones , Sebastian Reichel , Stephen Boyd , Tinghan Shen , Tzung-Bi Shih , Xiang wangx Subject: [PATCH 01/10] Revert "mfd: cros_ec: Add SCP Core-1 as a new CrOS EC MCU" Date: Wed, 28 Dec 2022 00:45:04 +0000 Message-Id: <20221228004648.793339-2-pmalani@chromium.org> X-Mailer: git-send-email 2.39.0.314.g84b9a713c41-goog In-Reply-To: <20221228004648.793339-1-pmalani@chromium.org> References: <20221228004648.793339-1-pmalani@chromium.org> Precedence: bulk X-Mailing-List: chrome-platform@lists.linux.dev List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 This reverts commit 66ee379d743c69c726b61d078119a34d5be96a35. The feature flag introduced by Commit 66ee379d743c ("mfd: cros_ec: Add SCP Core-1 as a new CrOS EC MCU") was not first added in the source EC code base[1]. This can lead to the possible misinterpration of an EC's supported feature set, as well as causes issues with all future feature flag updates. [1] https://source.chromium.org/chromium/chromiumos/platform/ec/+/main:include/ec_commands.h Signed-off-by: Prashant Malani Acked-by: Lee Jones Reviewed-by: Benson Leung --- While this patch modifies drivers/mfd, it would be preferable to submit it through the chrome-platform tree, since that eliminates cross-tree dependencies for the series of which this patch is a part. drivers/mfd/cros_ec_dev.c | 5 ----- include/linux/platform_data/cros_ec_commands.h | 2 -- include/linux/platform_data/cros_ec_proto.h | 1 - 3 files changed, 8 deletions(-) diff --git a/drivers/mfd/cros_ec_dev.c b/drivers/mfd/cros_ec_dev.c index 344ad03bdc42..02d4271dfe06 100644 --- a/drivers/mfd/cros_ec_dev.c +++ b/drivers/mfd/cros_ec_dev.c @@ -64,11 +64,6 @@ static const struct cros_feature_to_name cros_mcu_devices[] = { .name = CROS_EC_DEV_SCP_NAME, .desc = "System Control Processor", }, - { - .id = EC_FEATURE_SCP_C1, - .name = CROS_EC_DEV_SCP_C1_NAME, - .desc = "System Control Processor 2nd Core", - }, { .id = EC_FEATURE_TOUCHPAD, .name = CROS_EC_DEV_TP_NAME, diff --git a/include/linux/platform_data/cros_ec_commands.h b/include/linux/platform_data/cros_ec_commands.h index 5744a2d746aa..7c94bf5c8f05 100644 --- a/include/linux/platform_data/cros_ec_commands.h +++ b/include/linux/platform_data/cros_ec_commands.h @@ -1300,8 +1300,6 @@ enum ec_feature_code { * mux. */ EC_FEATURE_TYPEC_MUX_REQUIRE_AP_ACK = 43, - /* The MCU is a System Companion Processor (SCP) 2nd Core. */ - EC_FEATURE_SCP_C1 = 45, }; #define EC_FEATURE_MASK_0(event_code) BIT(event_code % 32) diff --git a/include/linux/platform_data/cros_ec_proto.h b/include/linux/platform_data/cros_ec_proto.h index e43107e0bee1..a1f5b6d6db3a 100644 --- a/include/linux/platform_data/cros_ec_proto.h +++ b/include/linux/platform_data/cros_ec_proto.h @@ -19,7 +19,6 @@ #define CROS_EC_DEV_ISH_NAME "cros_ish" #define CROS_EC_DEV_PD_NAME "cros_pd" #define CROS_EC_DEV_SCP_NAME "cros_scp" -#define CROS_EC_DEV_SCP_C1_NAME "cros_scp_c1" #define CROS_EC_DEV_TP_NAME "cros_tp" #define CROS_EC_DEV_EC_INDEX 0