From patchwork Tue Nov 21 13:49:53 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Patchwork-Submitter: =?utf-8?q?Uwe_Kleine-K=C3=B6nig?= X-Patchwork-Id: 13463192 Received: from metis.whiteo.stw.pengutronix.de (metis.whiteo.stw.pengutronix.de [185.203.201.7]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id E3ABA53806 for ; Tue, 21 Nov 2023 13:52:01 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; dmarc=none (p=none dis=none) header.from=pengutronix.de Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=pengutronix.de Authentication-Results: smtp.subspace.kernel.org; dkim=none Received: from drehscheibe.grey.stw.pengutronix.de ([2a0a:edc0:0:c01:1d::a2]) by metis.whiteo.stw.pengutronix.de with esmtps (TLS1.3:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.92) (envelope-from ) id 1r5RAS-0005Yc-IX; Tue, 21 Nov 2023 14:51:56 +0100 Received: from [2a0a:edc0:0:900:1d::77] (helo=ptz.office.stw.pengutronix.de) by drehscheibe.grey.stw.pengutronix.de with esmtps (TLS1.3) tls TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384 (Exim 4.94.2) (envelope-from ) id 1r5RAR-00Aaze-3a; Tue, 21 Nov 2023 14:51:55 +0100 Received: from ukl by ptz.office.stw.pengutronix.de with local (Exim 4.94.2) (envelope-from ) id 1r5RAQ-004xe9-Qp; Tue, 21 Nov 2023 14:51:54 +0100 From: =?utf-8?q?Uwe_Kleine-K=C3=B6nig?= To: Thierry Reding , Benson Leung Cc: Guenter Roeck , linux-pwm@vger.kernel.org, chrome-platform@lists.linux.dev, kernel@pengutronix.de Subject: [PATCH v3 051/108] pwm: cros-ec: Make use of devm_pwmchip_alloc() function Date: Tue, 21 Nov 2023 14:49:53 +0100 Message-ID: <20231121134901.208535-52-u.kleine-koenig@pengutronix.de> X-Mailer: git-send-email 2.42.0.586.gbc5204569f7d.dirty In-Reply-To: <20231121134901.208535-1-u.kleine-koenig@pengutronix.de> References: <20231121134901.208535-1-u.kleine-koenig@pengutronix.de> Precedence: bulk X-Mailing-List: chrome-platform@lists.linux.dev List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 X-Developer-Signature: v=1; a=openpgp-sha256; l=3448; i=u.kleine-koenig@pengutronix.de; h=from:subject; bh=e8/SuPnxTLgrP5C8bJZ/5xPYolAFPGXd6mgGRsmDOJo=; b=owEBbQGS/pANAwAKAY+A+1h9Ev5OAcsmYgBlXLWEhVI/vRknNnEUm2tLVwUS04OePsQsmAmxy 5QwFU8EVSqJATMEAAEKAB0WIQQ/gaxpOnoeWYmt/tOPgPtYfRL+TgUCZVy1hAAKCRCPgPtYfRL+ TtsbCACA35j/GT/QUSekyaoqSAlKTh9vfBgUjqHn02CgKJ0nvnr+B0xcit0luelUccUgLlr5aZW 9P0ruMU/lwYYSnl/TuMLj6BIuTF8qN0nA+P8XiygDUhCi87Uw/wVImCtzr0YV5n0ZPOavBGeP8a iok1rK/KhEb6F1UKz7vH1txJKtmWXf8MVCUY02y0HlSc0FU5MszdnoTOf/njvGm+1QVwo2aNoyV ZBaLLwru8iAIE+GqNA9vBSjr34Bf70+YREwp3wtsllIAArIetv/BKxqS18xoXk8Ff6o7/Tatwl0 jr7FusV3aijYRwVE1h6/aGVHseITv8pb6bpGYwQLccbMYBSV X-Developer-Key: i=u.kleine-koenig@pengutronix.de; a=openpgp; fpr=0D2511F322BFAB1C1580266BE2DCDD9132669BD6 X-SA-Exim-Connect-IP: 2a0a:edc0:0:c01:1d::a2 X-SA-Exim-Mail-From: ukl@pengutronix.de X-SA-Exim-Scanned: No (on metis.whiteo.stw.pengutronix.de); SAEximRunCond expanded to false X-PTX-Original-Recipient: chrome-platform@lists.linux.dev This prepares the pwm-cros-ec driver to further changes of the pwm core outlined in the commit introducing devm_pwmchip_alloc(). There is no intended semantical change and the driver should behave as before. The probe function had to be changed a bit because the number of PWMs must be determined before allocation of the pwm_chip and its private data now. Signed-off-by: Uwe Kleine-König --- drivers/pwm/pwm-cros-ec.c | 42 +++++++++++++++++++-------------------- 1 file changed, 21 insertions(+), 21 deletions(-) diff --git a/drivers/pwm/pwm-cros-ec.c b/drivers/pwm/pwm-cros-ec.c index 0ce8220646ea..290b22423804 100644 --- a/drivers/pwm/pwm-cros-ec.c +++ b/drivers/pwm/pwm-cros-ec.c @@ -26,7 +26,6 @@ */ struct cros_ec_pwm_device { struct cros_ec_device *ec; - struct pwm_chip chip; bool use_pwm_type; struct cros_ec_pwm *channel; }; @@ -41,7 +40,7 @@ struct cros_ec_pwm { static inline struct cros_ec_pwm_device *pwm_to_cros_ec_pwm(struct pwm_chip *chip) { - return container_of(chip, struct cros_ec_pwm_device, chip); + return pwmchip_priv(chip); } static int cros_ec_dt_type_to_pwm_type(u8 dt_index, u8 *pwm_type) @@ -226,13 +225,13 @@ static const struct pwm_ops cros_ec_pwm_ops = { * of PWMs it supports directly, so we have to read the pwm duty cycle for * subsequent channels until we get an error. */ -static int cros_ec_num_pwms(struct cros_ec_pwm_device *ec_pwm) +static int cros_ec_num_pwms(struct cros_ec_device *ec, bool use_pwm_type) { int i, ret; /* The index field is only 8 bits */ for (i = 0; i <= U8_MAX; i++) { - ret = cros_ec_pwm_get_duty(ec_pwm->ec, ec_pwm->use_pwm_type, i); + ret = cros_ec_pwm_get_duty(ec, use_pwm_type, i); /* * We look for SUCCESS, INVALID_COMMAND, or INVALID_PARAM * responses; everything else is treated as an error. @@ -261,35 +260,36 @@ static int cros_ec_pwm_probe(struct platform_device *pdev) struct device_node *np = pdev->dev.of_node; struct cros_ec_pwm_device *ec_pwm; struct pwm_chip *chip; + bool use_pwm_type = false; + unsigned npwm; int ret; if (!ec) return dev_err_probe(dev, -EINVAL, "no parent EC device\n"); - ec_pwm = devm_kzalloc(dev, sizeof(*ec_pwm), GFP_KERNEL); - if (!ec_pwm) - return -ENOMEM; - chip = &ec_pwm->chip; + if (of_device_is_compatible(np, "google,cros-ec-pwm-type")) { + use_pwm_type = true; + npwm = CROS_EC_PWM_DT_COUNT; + } else { + ret = cros_ec_num_pwms(ec, use_pwm_type); + if (ret < 0) + return dev_err_probe(dev, ret, "Couldn't find PWMs\n"); + npwm = ret; + } + + chip = devm_pwmchip_alloc(dev, npwm, sizeof(*ec_pwm)); + if (IS_ERR(chip)) + return PTR_ERR(chip); + + ec_pwm = pwm_to_cros_ec_pwm(chip); + ec_pwm->use_pwm_type = use_pwm_type; ec_pwm->ec = ec; - if (of_device_is_compatible(np, "google,cros-ec-pwm-type")) - ec_pwm->use_pwm_type = true; - /* PWM chip */ - chip->dev = dev; chip->ops = &cros_ec_pwm_ops; chip->of_xlate = cros_ec_pwm_xlate; chip->of_pwm_n_cells = 1; - if (ec_pwm->use_pwm_type) { - chip->npwm = CROS_EC_PWM_DT_COUNT; - } else { - ret = cros_ec_num_pwms(ec_pwm); - if (ret < 0) - return dev_err_probe(dev, ret, "Couldn't find PWMs\n"); - chip->npwm = ret; - } - ec_pwm->channel = devm_kcalloc(dev, chip->npwm, sizeof(*ec_pwm->channel), GFP_KERNEL); if (!ec_pwm->channel)