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[34.125.73.210]) by smtp.gmail.com with UTF8SMTPSA id d2e1a72fcca58-7127af3fae8sm151797b3a.208.2024.08.14.17.34.23 (version=TLS1_3 cipher=TLS_AES_128_GCM_SHA256 bits=128/128); Wed, 14 Aug 2024 17:34:24 -0700 (PDT) From: Stephen Boyd To: chrome-platform@lists.linux.dev Cc: linux-kernel@vger.kernel.org, patches@lists.linux.dev, devicetree@vger.kernel.org, Douglas Anderson , Pin-yen Lin , Andrzej Hajda , Benson Leung , Conor Dooley , Daniel Vetter , David Airlie , Dmitry Baryshkov , dri-devel@lists.freedesktop.org, Guenter Roeck , Jernej Skrabec , Jonas Karlman , Krzysztof Kozlowski , Laurent Pinchart , Lee Jones , Maarten Lankhorst , Maxime Ripard , Neil Armstrong , Prashant Malani , Robert Foss , Rob Herring , Thomas Zimmermann , Tzung-Bi Shih Subject: [PATCH v2 02/11] drm/bridge: Verify lane assignment is going to work during atomic_check Date: Wed, 14 Aug 2024 17:34:07 -0700 Message-ID: <20240815003417.1175506-3-swboyd@chromium.org> X-Mailer: git-send-email 2.46.0.76.ge559c4bf1a-goog In-Reply-To: <20240815003417.1175506-1-swboyd@chromium.org> References: <20240815003417.1175506-1-swboyd@chromium.org> Precedence: bulk X-Mailing-List: chrome-platform@lists.linux.dev List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Verify during drm_atomic_bridge_check() that the lane assignment set in a bridge's atomic_check() callback is going to be satisfied by the previous bridge. If the next bridge is requiring something besides the default 1:1 lane assignment on its input then there must be an output lane assignment on the previous bridge's output. Otherwise the next bridge won't get the lanes assigned that it needs. Cc: Andrzej Hajda Cc: Neil Armstrong Cc: Robert Foss Cc: Laurent Pinchart Cc: Jonas Karlman Cc: Jernej Skrabec Cc: Maarten Lankhorst Cc: Maxime Ripard Cc: Thomas Zimmermann Cc: David Airlie Cc: Daniel Vetter Cc: Cc: Pin-yen Lin Cc: Dmitry Baryshkov Signed-off-by: Stephen Boyd --- drivers/gpu/drm/drm_bridge.c | 16 ++++++++++++++++ 1 file changed, 16 insertions(+) diff --git a/drivers/gpu/drm/drm_bridge.c b/drivers/gpu/drm/drm_bridge.c index bd18c1e91dee..68c7a321b9b3 100644 --- a/drivers/gpu/drm/drm_bridge.c +++ b/drivers/gpu/drm/drm_bridge.c @@ -860,6 +860,10 @@ static int drm_atomic_bridge_check(struct drm_bridge *bridge, struct drm_crtc_state *crtc_state, struct drm_connector_state *conn_state) { + u8 num_input_lanes, num_output_lanes = 0; + const struct drm_lane_cfg *input_lanes; + int i; + if (bridge->funcs->atomic_check) { struct drm_bridge_state *bridge_state; int ret; @@ -873,12 +877,24 @@ static int drm_atomic_bridge_check(struct drm_bridge *bridge, crtc_state, conn_state); if (ret) return ret; + num_output_lanes = bridge_state->output_bus_cfg.num_lanes; } else if (bridge->funcs->mode_fixup) { if (!bridge->funcs->mode_fixup(bridge, &crtc_state->mode, &crtc_state->adjusted_mode)) return -EINVAL; } + input_lanes = drm_bridge_next_bridge_lane_cfg(bridge, + crtc_state->state, + &num_input_lanes); + /* + * Ensure this bridge is aware that the next bridge wants to + * reassign lanes. + */ + for (i = 0; i < num_input_lanes; i++) + if (i != input_lanes[i].logical && !num_output_lanes) + return -ENOTSUPP; + return 0; }