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[35.247.103.198]) by smtp.gmail.com with UTF8SMTPSA id d9443c01a7336-211057d833fsm335115ad.261.2024.10.30.14.29.16 (version=TLS1_3 cipher=TLS_AES_128_GCM_SHA256 bits=128/128); Wed, 30 Oct 2024 14:29:16 -0700 (PDT) From: Abhishek Pandit-Subedi To: heikki.krogerus@linux.intel.com, tzungbi@kernel.org, linux-usb@vger.kernel.org, chrome-platform@lists.linux.dev Cc: dmitry.baryshkov@linaro.org, jthies@google.com, akuchynski@google.com, pmalani@chromium.org, Abhishek Pandit-Subedi , Benson Leung , Guenter Roeck , linux-kernel@vger.kernel.org Subject: [PATCH v2 7/7] platform/chrome: cros_ec_typec: Disable tbt auto_enter Date: Wed, 30 Oct 2024 14:28:38 -0700 Message-ID: <20241030142833.v2.7.Ic14738918e3d026fa2d85e95fb68f8e07a0828d0@changeid> X-Mailer: git-send-email 2.47.0.163.g1226f6d8fa-goog In-Reply-To: <20241030212854.998318-1-abhishekpandit@chromium.org> References: <20241030212854.998318-1-abhishekpandit@chromium.org> Precedence: bulk X-Mailing-List: chrome-platform@lists.linux.dev List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Altmodes with cros_ec are either automatically entered by the EC or entered by the AP if TBT or USB4 are supported on the system. Due to the security risk of PCIe tunneling, TBT modes should not be auto entered by the kernel at this time and will require user intervention. With this change, a userspace program will need to explicitly activate the thunderbolt mode on the partner in order to enter the mode and the thunderbolt driver will not automatically enter when a partner is connected. Signed-off-by: Abhishek Pandit-Subedi --- Changes in v2: - Only disable auto-enter for Thunderbolt - Update commit message to clearly indicate the need for userspace intervention to enter TBT mode drivers/platform/chrome/cros_ec_typec.c | 3 ++- 1 file changed, 2 insertions(+), 1 deletion(-) diff --git a/drivers/platform/chrome/cros_ec_typec.c b/drivers/platform/chrome/cros_ec_typec.c index 3e043b1c1cc8..aadd2704e445 100644 --- a/drivers/platform/chrome/cros_ec_typec.c +++ b/drivers/platform/chrome/cros_ec_typec.c @@ -313,7 +313,8 @@ static int cros_typec_register_port_altmodes(struct cros_typec_data *typec, if (typec->ap_driven_altmode) { memset(&desc, 0, sizeof(desc)); desc.svid = USB_TYPEC_TBT_SID; - desc.mode = TYPEC_ANY_MODE; + desc.mode = USB_TYPEC_TBT_MODE; + desc.no_auto_enter = true; amode = cros_typec_register_thunderbolt(port, &desc); if (IS_ERR(amode)) return PTR_ERR(amode);