From patchwork Mon Jul 15 13:29:45 2019 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Patchwork-Submitter: Biju Das X-Patchwork-Id: 11044059 Return-Path: Received: from mail.wl.linuxfoundation.org (pdx-wl-mail.web.codeaurora.org [172.30.200.125]) by pdx-korg-patchwork-2.web.codeaurora.org (Postfix) with ESMTP id 0A34D1395 for ; Mon, 15 Jul 2019 13:35:39 +0000 (UTC) Received: from mail.wl.linuxfoundation.org (localhost [127.0.0.1]) by mail.wl.linuxfoundation.org (Postfix) with ESMTP id E6BF6223A6 for ; Mon, 15 Jul 2019 13:35:38 +0000 (UTC) Received: by mail.wl.linuxfoundation.org (Postfix, from userid 486) id DB0A02846C; Mon, 15 Jul 2019 13:35:38 +0000 (UTC) X-Spam-Checker-Version: SpamAssassin 3.3.1 (2010-03-16) on pdx-wl-mail.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-5.2 required=2.0 tests=BAYES_00,MAILING_LIST_MULTI, RCVD_IN_DNSWL_MED autolearn=ham version=3.3.1 Received: from mail.linuxfoundation.org (mail.linuxfoundation.org [140.211.169.12]) (using TLSv1.2 with cipher DHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by mail.wl.linuxfoundation.org (Postfix) with ESMTPS id F2EEF223A6 for ; Mon, 15 Jul 2019 13:35:36 +0000 (UTC) Received: from mail.linux-foundation.org (localhost [127.0.0.1]) by mail.linuxfoundation.org (Postfix) with ESMTP id BE4EDD9B; Mon, 15 Jul 2019 13:35:36 +0000 (UTC) X-Original-To: cip-dev@lists.cip-project.org Delivered-To: cip-dev@mail.linuxfoundation.org Received: from smtp1.linuxfoundation.org (smtp1.linux-foundation.org [172.17.192.35]) by mail.linuxfoundation.org (Postfix) with ESMTPS id BE156D9B for ; Mon, 15 Jul 2019 13:35:35 +0000 (UTC) X-Greylist: domain auto-whitelisted by SQLgrey-1.7.6 Received: from relmlie5.idc.renesas.com (relmlor1.renesas.com [210.160.252.171]) by smtp1.linuxfoundation.org (Postfix) with ESMTP id 1A1A5879 for ; Mon, 15 Jul 2019 13:35:34 +0000 (UTC) X-IronPort-AV: E=Sophos;i="5.62,493,1554735600"; d="scan'208";a="21445267" Received: from unknown (HELO relmlir6.idc.renesas.com) ([10.200.68.152]) by relmlie5.idc.renesas.com with ESMTP; 15 Jul 2019 22:35:33 +0900 Received: from be1yocto.ree.adwin.renesas.com (unknown [172.29.43.62]) by relmlir6.idc.renesas.com (Postfix) with ESMTP id BFC334237F7D; Mon, 15 Jul 2019 22:35:32 +0900 (JST) From: Biju Das To: cip-dev@lists.cip-project.org Date: Mon, 15 Jul 2019 14:29:45 +0100 Message-Id: <1563197408-59548-1-git-send-email-biju.das@bp.renesas.com> X-Mailer: git-send-email 2.7.4 MIME-Version: 1.0 Cc: Biju Das Subject: [cip-dev] [PATCH 4.19.y-cip 00/23] Clock enhancements X-BeenThere: cip-dev@lists.cip-project.org X-Mailman-Version: 2.1.12 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Sender: cip-dev-bounces@lists.cip-project.org Errors-To: cip-dev-bounces@lists.cip-project.org X-Virus-Scanned: ClamAV using ClamSMTP This patch series add OPP tables,HS400 quirk for SD clock, add support Z2 clock and fix some of parent clocks. This patch series is based on linux-4.19.y-cip and all the patches in this series are cherry-picked from linux rc tree. Biju Das (2): clk: renesas: rcar-gen3: Parameterise Z and Z2 clock fixed divisor clk: renesas: rcar-gen3: Parameterise Z and Z2 clock offset Fabrizio Castro (3): clk: renesas: r8a774a1: Add missing CANFD clock clk: renesas: r8a774a1: Fix LAST_DT_CORE_CLK arm64: dts: renesas: r8a774c0: Add OPPs table for cpu devices Geert Uytterhoeven (2): clk: renesas: r8a774a1: Add CPEX clock clk: renesas: rcar-gen3: Pass name/offset to cpg_sd_clk_register() Kazuya Mizuguchi (2): clk: renesas: rcar-gen3: Correct parent clock of EHCI/OHCI clk: renesas: rcar-gen3: Correct parent clock of HS-USB Niklas Söderlund (3): clk: renesas: rcar-gen3: Set state when registering SD clocks clk: renesas: rcar-gen3: Add documentation for SD clocks clk: renesas: rcar-gen3: Add HS400 quirk for SD clock Sergei Shtylyov (2): clk: renesas: rcar-gen3: Factor out cpg_reg_modify() clk: renesas: rcar-gen3: Add spinlock Simon Horman (4): clk: renesas: rcar-gen3: Remove CLK_TYPE_GEN3_Z2 math64: New DIV64_U64_ROUND_CLOSEST helper clk: renesas: rcar-gen3: Support Z and Z2 clocks with high frequency parents clk: renesas: r8a774c0: Add Z2 clock Stephen Boyd (2): clk: renesas: Remove usage of CLK_IS_BASIC clk: renesas: rcar-gen3: Remove unused variable Takeshi Kihara (3): clk: renesas: rcar-gen3: Correct parent clock of SYS-DMAC clk: renesas: rcar-gen3: Correct parent clock of Audio-DMAC clk: renesas: rcar-gen3: Fix cpg_sd_clock_round_rate() return value arch/arm64/boot/dts/renesas/r8a774c0.dtsi | 25 ++++ drivers/clk/renesas/clk-div6.c | 2 +- drivers/clk/renesas/clk-mstp.c | 2 +- drivers/clk/renesas/r8a774a1-cpg-mssr.c | 23 ++-- drivers/clk/renesas/r8a774c0-cpg-mssr.c | 7 +- drivers/clk/renesas/r8a7795-cpg-mssr.c | 25 ++-- drivers/clk/renesas/r8a7796-cpg-mssr.c | 19 +-- drivers/clk/renesas/r8a77965-cpg-mssr.c | 16 +-- drivers/clk/renesas/r8a77990-cpg-mssr.c | 6 +- drivers/clk/renesas/r8a77995-cpg-mssr.c | 2 +- drivers/clk/renesas/rcar-gen3-cpg.c | 174 ++++++++++++++------------ drivers/clk/renesas/rcar-gen3-cpg.h | 5 +- drivers/clk/renesas/renesas-cpg-mssr.c | 2 +- include/dt-bindings/clock/r8a774a1-cpg-mssr.h | 1 + include/linux/math64.h | 13 ++ 15 files changed, 193 insertions(+), 129 deletions(-)