[5.10.y-cip,00/26] Add RZ/G2UL support

Message ID	20220831164645.2134258-1-biju.das.jz@bp.renesas.com (mailing list archive)
Headers	show Return-Path: <biju.das.jz@bp.renesas.com> ip: 210.160.252.172, mailfrom: biju.das.jz@bp.renesas.com) From: Biju Das <biju.das.jz@bp.renesas.com> To: cip-dev@lists.cip-project.org, Nobuhiro Iwamatsu <nobuhiro1.iwamatsu@toshiba.co.jp>, Pavel Machek <pavel@denx.de> Cc: Chris Paterson <chris.paterson2@renesas.com>, Biju Das <biju.das.jz@bp.renesas.com>, Prabhakar Mahadev Lad <prabhakar.mahadev-lad.rj@bp.renesas.com> Subject: [PATCH 5.10.y-cip 00/26] Add RZ/G2UL support Date: Wed, 31 Aug 2022 17:46:19 +0100 Message-Id: <20220831164645.2134258-1-biju.das.jz@bp.renesas.com> MIME-Version: 1.0 Content-Transfer-Encoding: 8bit
Series	Add RZ/G2UL support \| expand [5.10.y-cip,00/26] Add RZ/G2UL support [5.10.y-cip,01/26] dt-bindings: clock: Add R9A07G043 CPG Clock and Reset Definitions [5.10.y-cip,02/26] soc: renesas: Identify RZ/G2UL SoC [5.10.y-cip,03/26] clk: renesas: Add support for RZ/G2UL SoC [5.10.y-cip,04/26] clk: renesas: r9a07g043: Add GPIO clock and reset entries [5.10.y-cip,05/26] clk: renesas: r9a07g043: Add ethernet clock sources [5.10.y-cip,06/26] clk: renesas: r9a07g043: Add GbEthernet clock/reset [5.10.y-cip,07/26] clk: renesas: r9a07g043: Add SDHI clock and reset entries [5.10.y-cip,08/26] clk: renesas: r9a07g043: Add I2C clocks/resets [5.10.y-cip,09/26] clk: renesas: r9a07g043: Add SSIF-2 clock and reset entries [5.10.y-cip,10/26] clk: renesas: r9a07g043: Add USB clocks/resets [5.10.y-cip,11/26] clk: renesas: r9a07g043: Add clock and reset entries for CANFD [5.10.y-cip,12/26] clk: renesas: r9a07g043: Add OSTM clock and reset entries [5.10.y-cip,13/26] clk: renesas: r9a07g043: Add WDT clock and reset entries [5.10.y-cip,14/26] pinctrl: renesas: rzg2l: Add RZ/G2UL support [5.10.y-cip,15/26] pinctrl: renesas: rzg2l: Restore pin config order [5.10.y-cip,16/26] pinctrl: renesas: rzg2l: Return -EINVAL for pins which have input disabled [5.10.y-cip,17/26] arm64: dts: renesas: Add initial DTSI for RZ/G2UL SoC [5.10.y-cip,18/26] arm64: dts: renesas: Add initial device tree for RZ/G2UL Type-1 SMARC EVK [5.10.y-cip,19/26] arm64: dts: renesas: r9a07g043: Fillup the pinctrl stub node [5.10.y-cip,20/26] arm64: dts: renesas: rzg2ul-smarc: Add scif0 and audio clk pins [5.10.y-cip,21/26] arm64: dts: renesas: r9a07g043: Add SDHI nodes [5.10.y-cip,22/26] arm64: dts: renesas: r9a07g043: Add GbEthernet nodes [5.10.y-cip,23/26] arm64: defconfig: Enable ARCH_R9A07G043 [5.10.y-cip,24/26] arm64: dts: renesas: rzg2ul-smarc: Enable microSD on SMARC platform [5.10.y-cip,25/26] arm64: dts: renesas: rzg2ul-smarc-som: Enable eMMC on SMARC platform [5.10.y-cip,26/26] arm64: dts: renesas: rzg2ul-smarc-som: Enable Ethernet on SMARC platform

Message ID

20220831164645.2134258-1-biju.das.jz@bp.renesas.com (mailing list archive)

Headers

From: Biju Das <biju.das.jz@bp.renesas.com>
To: cip-dev@lists.cip-project.org,
	Nobuhiro Iwamatsu <nobuhiro1.iwamatsu@toshiba.co.jp>,
	Pavel Machek <pavel@denx.de>
Cc: Chris Paterson <chris.paterson2@renesas.com>,
	Biju Das <biju.das.jz@bp.renesas.com>,
	Prabhakar Mahadev Lad <prabhakar.mahadev-lad.rj@bp.renesas.com>
Subject: [PATCH 5.10.y-cip 00/26] Add RZ/G2UL support
Date: Wed, 31 Aug 2022 17:46:19 +0100
Message-Id: <20220831164645.2134258-1-biju.das.jz@bp.renesas.com>
MIME-Version: 1.0
Content-Transfer-Encoding: 8bit

Series

Add RZ/G2UL support | expand

Message

Biju Das Aug. 31, 2022, 4:46 p.m. UTC

This patch series aims to add Basic board support for SMARC EVK
based on RZ/G2UL SoC.

All these patches are cherry-picked from the mainline.

Subsequent patch series will add more functionality to this platform.

RZ/G2UL SMARC EVK logs:
root@smarc-rzg2ul:~# cat /sys/devices/soc0/family
RZ/G2UL
root@smarc-rzg2ul:~# cat /sys/devices/soc0/machine
Renesas SMARC EVK based on r9a07g043u11
root@smarc-rzg2ul:~# cat /sys/devices/soc0/revision
0
root@smarc-rzg2ul:~# cat /sys/devices/soc0/soc_id
r9a07g043
root@smarc-rzg2ul:~# dmesg  | grep Detect
[    0.021282] Detected Renesas RZ/G2UL r9a07g043 Rev 0

Biju Das (24):
  dt-bindings: clock: Add R9A07G043 CPG Clock and Reset Definitions
  soc: renesas: Identify RZ/G2UL SoC
  clk: renesas: Add support for RZ/G2UL SoC
  clk: renesas: r9a07g043: Add GPIO clock and reset entries
  clk: renesas: r9a07g043: Add ethernet clock sources
  clk: renesas: r9a07g043: Add GbEthernet clock/reset
  clk: renesas: r9a07g043: Add SDHI clock and reset entries
  clk: renesas: r9a07g043: Add I2C clocks/resets
  clk: renesas: r9a07g043: Add SSIF-2 clock and reset entries
  clk: renesas: r9a07g043: Add USB clocks/resets
  clk: renesas: r9a07g043: Add clock and reset entries for CANFD
  clk: renesas: r9a07g043: Add OSTM clock and reset entries
  clk: renesas: r9a07g043: Add WDT clock and reset entries
  pinctrl: renesas: rzg2l: Add RZ/G2UL support
  arm64: dts: renesas: Add initial DTSI for RZ/G2UL SoC
  arm64: dts: renesas: Add initial device tree for RZ/G2UL Type-1 SMARC
    EVK
  arm64: dts: renesas: r9a07g043: Fillup the pinctrl stub node
  arm64: dts: renesas: rzg2ul-smarc: Add scif0 and audio clk pins
  arm64: dts: renesas: r9a07g043: Add SDHI nodes
  arm64: dts: renesas: r9a07g043: Add GbEthernet nodes
  arm64: defconfig: Enable ARCH_R9A07G043
  arm64: dts: renesas: rzg2ul-smarc: Enable microSD on SMARC platform
  arm64: dts: renesas: rzg2ul-smarc-som: Enable eMMC on SMARC platform
  arm64: dts: renesas: rzg2ul-smarc-som: Enable Ethernet on SMARC
    platform

Geert Uytterhoeven (1):
  pinctrl: renesas: rzg2l: Restore pin config order

Lad Prabhakar (1):
  pinctrl: renesas: rzg2l: Return -EINVAL for pins which have input
    disabled

 arch/arm64/boot/dts/renesas/Makefile          |   2 +
 arch/arm64/boot/dts/renesas/r9a07g043.dtsi    | 481 ++++++++++++++++++
 .../boot/dts/renesas/r9a07g043u11-smarc.dts   |  97 ++++
 .../dts/renesas/rzg2ul-smarc-pinfunction.dtsi |  63 +++
 .../boot/dts/renesas/rzg2ul-smarc-som.dtsi    | 233 +++++++++
 arch/arm64/boot/dts/renesas/rzg2ul-smarc.dtsi |  24 +
 arch/arm64/configs/defconfig                  |   1 +
 drivers/clk/renesas/Kconfig                   |   7 +-
 drivers/clk/renesas/Makefile                  |   1 +
 drivers/clk/renesas/r9a07g043-cpg.c           | 288 +++++++++++
 drivers/clk/renesas/rzg2l-cpg.c               |   6 +
 drivers/clk/renesas/rzg2l-cpg.h               |   1 +
 drivers/pinctrl/renesas/Kconfig               |   5 +-
 drivers/pinctrl/renesas/pinctrl-rzg2l.c       | 202 +++++---
 drivers/soc/renesas/Kconfig                   |   6 +
 drivers/soc/renesas/renesas-soc.c             |  13 +
 include/dt-bindings/clock/r9a07g043-cpg.h     | 184 +++++++
 17 files changed, 1532 insertions(+), 82 deletions(-)
 create mode 100644 arch/arm64/boot/dts/renesas/r9a07g043.dtsi
 create mode 100644 arch/arm64/boot/dts/renesas/r9a07g043u11-smarc.dts
 create mode 100644 arch/arm64/boot/dts/renesas/rzg2ul-smarc-pinfunction.dtsi
 create mode 100644 arch/arm64/boot/dts/renesas/rzg2ul-smarc-som.dtsi
 create mode 100644 arch/arm64/boot/dts/renesas/rzg2ul-smarc.dtsi
 create mode 100644 drivers/clk/renesas/r9a07g043-cpg.c
 create mode 100644 include/dt-bindings/clock/r9a07g043-cpg.h

Comments

Pavel Machek Sept. 2, 2022, 10:33 a.m. UTC | #1

Hi!

> This patch series aims to add Basic board support for SMARC EVK
> based on RZ/G2UL SoC.
> 
> All these patches are cherry-picked from the mainline.
> 
> Subsequent patch series will add more functionality to this
> platform.

This series looks okay for me.

The only weird thing is 26/, where we enable nfsroot in the dts. I
guess that's convenient for your configuration, but booting from eMMC
is going to be more common, and I guess it may confusing to some.

Best regards,
								Pavel
--
'DENX Software Engineering GmbH,      Managing Director: Wolfgang Denk'
'HRB 165235 Munich, Office: Kirchenstr.5, D-82194 Groebenzell, Germany'

Biju Das Sept. 2, 2022, 11:04 a.m. UTC | #2

Hi Pavel,

Thanks for feedback.

> Subject: Re: [PATCH 5.10.y-cip 00/26] Add RZ/G2UL support
> 
> Hi!
> 
> > This patch series aims to add Basic board support for SMARC EVK based
> > on RZ/G2UL SoC.
> >
> > All these patches are cherry-picked from the mainline.
> >
> > Subsequent patch series will add more functionality to this platform.
> 
> This series looks okay for me.
> 
> The only weird thing is 26/, where we enable nfsroot in the dts. I guess
> that's convenient for your configuration, but booting from eMMC is going
> to be more common, and I guess it may confusing to some.

Yes, I agree for production boards, booting from eMMC is going to be common.
eMMC boot from bootROM, loading kernel/dtb from eMMC and mounting rootFS on eMMC.

On all Renesas development boards, we are using default bootargs option as NFS.
As it more convenient for testing on development boards.

Cheers,
Biju

Pavel Machek Sept. 6, 2022, 7:04 a.m. UTC | #3

Hi!

> This patch series aims to add Basic board support for SMARC EVK
> based on RZ/G2UL SoC.

Thank you, applied.

Best regards,
							Pavel