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([82.78.167.102]) by smtp.gmail.com with ESMTPSA id 5b1f17b1804b1-43656b01b15sm18746445e9.11.2024.12.18.04.23.17 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Wed, 18 Dec 2024 04:23:18 -0800 (PST) From: Claudiu X-Google-Original-From: Claudiu To: nobuhiro1.iwamatsu@toshiba.co.jp, pavel@denx.de Cc: claudiu.beznea@tuxon.dev, cip-dev@lists.cip-project.org, biju.das.jz@bp.renesas.com, prabhakar.mahadev-lad.rj@bp.renesas.com Subject: [cip dev][PATCH 5.10.y-cip 00/10] watchdog: rzg2l_wdt: Backport RZ/G3S support Date: Wed, 18 Dec 2024 14:23:07 +0200 Message-ID: <20241218122317.2365272-1-claudiu.beznea.uj@bp.renesas.com> X-Mailer: git-send-email 2.43.0 MIME-Version: 1.0 List-Id: X-Webhook-Received: from li982-79.members.linode.com [45.33.32.79] by aws-us-west-2-korg-lkml-1.web.codeaurora.org with HTTPS for ; Wed, 18 Dec 2024 12:23:25 -0000 X-Groupsio-URL: https://lists.cip-project.org/g/cip-dev/message/17453 From: Claudiu Beznea Series backports the watchdog support for the Renesas RZ/G3S SoC. Thank you, Claudiu Beznea Claudiu Beznea (10): clk: renesas: r9a08g045: Add clock and reset support for watchdog watchdog: rzg2l_wdt: Use pm_runtime_resume_and_get() watchdog: rzg2l_wdt: Check return status of pm_runtime_put() watchdog: rzg2l_wdt: Remove reset de-assert from probe watchdog: rzg2l_wdt: Remove comparison with zero watchdog: rzg2l_wdt: Rely on the reset driver for doing proper reset watchdog: rzg2l_wdt: Add suspend/resume support watchdog: rzg2l_wdt: Power on the watchdog domain in the restart handler arm64: dts: renesas: r9a08g045: Add watchdog node arm64: dts: renesas: rzg3s-smarc-som: Enable the watchdog interface arch/arm64/boot/dts/renesas/r9a08g045.dtsi | 14 ++ .../boot/dts/renesas/rzg3s-smarc-som.dtsi | 5 + drivers/clk/renesas/r9a08g045-cpg.c | 3 + drivers/watchdog/rzg2l_wdt.c | 133 +++++++++++------- 4 files changed, 103 insertions(+), 52 deletions(-) Reviewed-by: Nobuhiro Iwamatsu