From patchwork Mon Oct 15 10:23:27 2018 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Patryk Mungai X-Patchwork-Id: 10641529 X-Patchwork-Delegate: iwamatsu@nigauri.org Return-Path: Received: from mail.wl.linuxfoundation.org (pdx-wl-mail.web.codeaurora.org [172.30.200.125]) by pdx-korg-patchwork-2.web.codeaurora.org (Postfix) with ESMTP id 9B264157A for ; Mon, 15 Oct 2018 10:23:54 +0000 (UTC) Received: from mail.wl.linuxfoundation.org (localhost [127.0.0.1]) by mail.wl.linuxfoundation.org (Postfix) with ESMTP id 8815D29475 for ; Mon, 15 Oct 2018 10:23:54 +0000 (UTC) Received: by mail.wl.linuxfoundation.org (Postfix, from userid 486) id 7A5032947A; Mon, 15 Oct 2018 10:23:54 +0000 (UTC) X-Spam-Checker-Version: SpamAssassin 3.3.1 (2010-03-16) on pdx-wl-mail.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-5.2 required=2.0 tests=BAYES_00,MAILING_LIST_MULTI, RCVD_IN_DNSWL_MED autolearn=ham version=3.3.1 Received: from mail.linuxfoundation.org (mail.linuxfoundation.org [140.211.169.12]) (using TLSv1.2 with cipher DHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by mail.wl.linuxfoundation.org (Postfix) with ESMTPS id B64DF29475 for ; Mon, 15 Oct 2018 10:23:53 +0000 (UTC) Received: from mail.linux-foundation.org (localhost [127.0.0.1]) by mail.linuxfoundation.org (Postfix) with ESMTP id 8BEC41A3C; Mon, 15 Oct 2018 10:23:53 +0000 (UTC) X-Original-To: cip-dev@lists.cip-project.org Delivered-To: cip-dev@mail.linuxfoundation.org Received: from smtp1.linuxfoundation.org (smtp1.linux-foundation.org [172.17.192.35]) by mail.linuxfoundation.org (Postfix) with ESMTPS id 3C70B1A3C for ; Mon, 15 Oct 2018 10:23:52 +0000 (UTC) X-Greylist: domain auto-whitelisted by SQLgrey-1.7.6 Received: from relmlie2.idc.renesas.com (relmlor3.renesas.com [210.160.252.173]) by smtp1.linuxfoundation.org (Postfix) with ESMTP id EC9476FB for ; Mon, 15 Oct 2018 10:23:49 +0000 (UTC) Received: from unknown (HELO relmlir1.idc.renesas.com) ([10.200.68.151]) by relmlie2.idc.renesas.com with ESMTP; 15 Oct 2018 19:23:48 +0900 Received: from relmlii1.idc.renesas.com (relmlii1.idc.renesas.com [10.200.68.65]) by relmlir1.idc.renesas.com (Postfix) with ESMTP id EA3AF821E8; Mon, 15 Oct 2018 19:23:48 +0900 (JST) X-IronPort-AV: E=Sophos;i="5.54,384,1534777200"; d="scan'208";a="293596849" Received: from unknown (HELO patryk-linuxbox.ree.adwin.renesas.com) ([10.226.36.148]) by relmlii1.idc.renesas.com with ESMTP; 15 Oct 2018 19:23:47 +0900 From: Patryk Mungai To: cip-dev@lists.cip-project.org Date: Mon, 15 Oct 2018 11:23:27 +0100 Message-Id: <1539599008-8382-2-git-send-email-patryk.mungai-ndungu.kx@renesas.com> X-Mailer: git-send-email 2.7.4 In-Reply-To: <1539599008-8382-1-git-send-email-patryk.mungai-ndungu.kx@renesas.com> References: <1539599008-8382-1-git-send-email-patryk.mungai-ndungu.kx@renesas.com> Subject: [cip-dev] [PATCH 1/2] ARM: dts: r8a7745: Add PMU device node X-BeenThere: cip-dev@lists.cip-project.org X-Mailman-Version: 2.1.12 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , MIME-Version: 1.0 Sender: cip-dev-bounces@lists.cip-project.org Errors-To: cip-dev-bounces@lists.cip-project.org X-Virus-Scanned: ClamAV using ClamSMTP From: Geert Uytterhoeven Commit 9562a6b1d0f6a287f5dda16a4538526c59408927 upstream. Enable support for the ARM Performance Monitor Units in the Cortex-A7 CPU cores on RZ/G1E by adding a device node for the PMU. New Linux output: hw perfevents: enabled with armv7_cortex_a7 PMU driver, 5 counters available Signed-off-by: Geert Uytterhoeven Signed-off-by: Simon Horman [Backport to CIP] Signed-off-by: Patryk Mungai Reviewed-by: Chris Paterson --- arch/arm/boot/dts/r8a7745.dtsi | 7 +++++++ 1 file changed, 7 insertions(+) diff --git a/arch/arm/boot/dts/r8a7745.dtsi b/arch/arm/boot/dts/r8a7745.dtsi index 69b383c..54b556b 100644 --- a/arch/arm/boot/dts/r8a7745.dtsi +++ b/arch/arm/boot/dts/r8a7745.dtsi @@ -93,6 +93,13 @@ }; }; + pmu { + compatible = "arm,cortex-a7-pmu"; + interrupts-extended = <&gic GIC_SPI 82 IRQ_TYPE_LEVEL_HIGH>, + <&gic GIC_SPI 83 IRQ_TYPE_LEVEL_HIGH>; + interrupt-affinity = <&cpu0>, <&cpu1>; + }; + soc { compatible = "simple-bus"; interrupt-parent = <&gic>;