From patchwork Fri Mar 29 08:32:36 2019 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Fabrizio Castro X-Patchwork-Id: 10876649 X-Patchwork-Delegate: pavel@denx.de Return-Path: Received: from mail.wl.linuxfoundation.org (pdx-wl-mail.web.codeaurora.org [172.30.200.125]) by pdx-korg-patchwork-2.web.codeaurora.org (Postfix) with ESMTP id 87D791708 for ; Fri, 29 Mar 2019 08:37:53 +0000 (UTC) Received: from mail.wl.linuxfoundation.org (localhost [127.0.0.1]) by mail.wl.linuxfoundation.org (Postfix) with ESMTP id 6DD1D28F59 for ; Fri, 29 Mar 2019 08:37:53 +0000 (UTC) Received: by mail.wl.linuxfoundation.org (Postfix, from userid 486) id 5F1DA290CC; Fri, 29 Mar 2019 08:37:53 +0000 (UTC) X-Spam-Checker-Version: SpamAssassin 3.3.1 (2010-03-16) on pdx-wl-mail.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-5.2 required=2.0 tests=BAYES_00,MAILING_LIST_MULTI, RCVD_IN_DNSWL_MED autolearn=ham version=3.3.1 Received: from mail.linuxfoundation.org (mail.linuxfoundation.org [140.211.169.12]) (using TLSv1.2 with cipher DHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by mail.wl.linuxfoundation.org (Postfix) with ESMTPS id 1BBC428F59 for ; Fri, 29 Mar 2019 08:37:53 +0000 (UTC) Received: from mail.linux-foundation.org (localhost [127.0.0.1]) by mail.linuxfoundation.org (Postfix) with ESMTP id 49993F51; Fri, 29 Mar 2019 08:37:51 +0000 (UTC) X-Original-To: cip-dev@lists.cip-project.org Delivered-To: cip-dev@mail.linuxfoundation.org Received: from smtp1.linuxfoundation.org (smtp1.linux-foundation.org [172.17.192.35]) by mail.linuxfoundation.org (Postfix) with ESMTPS id 5408CF51 for ; Fri, 29 Mar 2019 08:37:50 +0000 (UTC) X-Greylist: domain auto-whitelisted by SQLgrey-1.7.6 Received: from relmlie6.idc.renesas.com (relmlor2.renesas.com [210.160.252.172]) by smtp1.linuxfoundation.org (Postfix) with ESMTP id 2B55F837 for ; Fri, 29 Mar 2019 08:37:46 +0000 (UTC) X-IronPort-AV: E=Sophos;i="5.60,283,1549897200"; d="scan'208";a="11484488" Received: from unknown (HELO relmlir6.idc.renesas.com) ([10.200.68.152]) by relmlie6.idc.renesas.com with ESMTP; 29 Mar 2019 17:32:44 +0900 Received: from fabrizio-dev.ree.adwin.renesas.com (unknown [10.226.36.196]) by relmlir6.idc.renesas.com (Postfix) with ESMTP id 16A8D41EBB4D; Fri, 29 Mar 2019 17:32:42 +0900 (JST) From: Fabrizio Castro To: cip-dev@lists.cip-project.org Date: Fri, 29 Mar 2019 08:32:36 +0000 Message-Id: <1553848357-30592-4-git-send-email-fabrizio.castro@bp.renesas.com> X-Mailer: git-send-email 2.7.4 In-Reply-To: <1553848357-30592-1-git-send-email-fabrizio.castro@bp.renesas.com> References: <1553848357-30592-1-git-send-email-fabrizio.castro@bp.renesas.com> Cc: Biju Das Subject: [cip-dev] [PATCH 4.19.y 3/4] arm64: dts: renesas: r8a774c0-cat874: Add pciec0 support X-BeenThere: cip-dev@lists.cip-project.org X-Mailman-Version: 2.1.12 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , MIME-Version: 1.0 Sender: cip-dev-bounces@lists.cip-project.org Errors-To: cip-dev-bounces@lists.cip-project.org X-Virus-Scanned: ClamAV using ClamSMTP From: Biju Das Silicon Linux CAT 874 board has 2GB DDR memory. Update the dma-ranges mapping for pciec0 node. Also declare pcie bus clock, since it is generated on the CAT874 main board. Signed-off-by: Biju Das Reviewed-by: Geert Uytterhoeven Signed-off-by: Simon Horman (cherry picked from commit aaf6c75c0458122600a20db9d41a0350f0a8dff8) Signed-off-by: Fabrizio Castro --- arch/arm64/boot/dts/renesas/r8a774c0-cat874.dts | 9 +++++++++ 1 file changed, 9 insertions(+) diff --git a/arch/arm64/boot/dts/renesas/r8a774c0-cat874.dts b/arch/arm64/boot/dts/renesas/r8a774c0-cat874.dts index 477a56b..96ee0d2c 100644 --- a/arch/arm64/boot/dts/renesas/r8a774c0-cat874.dts +++ b/arch/arm64/boot/dts/renesas/r8a774c0-cat874.dts @@ -56,6 +56,15 @@ clock-frequency = <48000000>; }; +&pcie_bus_clk { + clock-frequency = <100000000>; +}; + +&pciec0 { + /* Map all possible DDR as inbound ranges */ + dma-ranges = <0x42000000 0 0x40000000 0 0x40000000 0 0x80000000>; +}; + &pfc { scif2_pins: scif2 { groups = "scif2_data_a";