From patchwork Thu May 16 09:39:16 2019 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Fabrizio Castro X-Patchwork-Id: 10946115 X-Patchwork-Delegate: iwamatsu@nigauri.org Return-Path: Received: from mail.wl.linuxfoundation.org (pdx-wl-mail.web.codeaurora.org [172.30.200.125]) by pdx-korg-patchwork-2.web.codeaurora.org (Postfix) with ESMTP id B35CC912 for ; Thu, 16 May 2019 09:40:24 +0000 (UTC) Received: from mail.wl.linuxfoundation.org (localhost [127.0.0.1]) by mail.wl.linuxfoundation.org (Postfix) with ESMTP id 99718285D8 for ; Thu, 16 May 2019 09:40:24 +0000 (UTC) Received: by mail.wl.linuxfoundation.org (Postfix, from userid 486) id 969BD28AC0; Thu, 16 May 2019 09:40:24 +0000 (UTC) X-Spam-Checker-Version: SpamAssassin 3.3.1 (2010-03-16) on pdx-wl-mail.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-5.2 required=2.0 tests=BAYES_00,MAILING_LIST_MULTI, RCVD_IN_DNSWL_MED autolearn=ham version=3.3.1 Received: from mail.linuxfoundation.org (mail.linuxfoundation.org [140.211.169.12]) (using TLSv1.2 with cipher DHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by mail.wl.linuxfoundation.org (Postfix) with ESMTPS id 28D7928985 for ; Thu, 16 May 2019 09:40:24 +0000 (UTC) Received: from mail.linux-foundation.org (localhost [127.0.0.1]) by mail.linuxfoundation.org (Postfix) with ESMTP id 19262C4E; Thu, 16 May 2019 09:40:15 +0000 (UTC) X-Original-To: cip-dev@lists.cip-project.org Delivered-To: cip-dev@mail.linuxfoundation.org Received: from smtp1.linuxfoundation.org (smtp1.linux-foundation.org [172.17.192.35]) by mail.linuxfoundation.org (Postfix) with ESMTPS id 82B95C4E for ; Thu, 16 May 2019 09:40:14 +0000 (UTC) X-Greylist: domain auto-whitelisted by SQLgrey-1.7.6 Received: from relmlie5.idc.renesas.com (relmlor1.renesas.com [210.160.252.171]) by smtp1.linuxfoundation.org (Postfix) with ESMTP id 9A32B87C for ; Thu, 16 May 2019 09:40:13 +0000 (UTC) X-IronPort-AV: E=Sophos;i="5.60,476,1549897200"; d="scan'208";a="16125762" Received: from unknown (HELO relmlir6.idc.renesas.com) ([10.200.68.152]) by relmlie5.idc.renesas.com with ESMTP; 16 May 2019 18:40:13 +0900 Received: from fabrizio-dev.ree.adwin.renesas.com (unknown [10.226.36.196]) by relmlir6.idc.renesas.com (Postfix) with ESMTP id 196A942CA9EF; Thu, 16 May 2019 18:40:11 +0900 (JST) From: Fabrizio Castro To: cip-dev@lists.cip-project.org Date: Thu, 16 May 2019 10:39:16 +0100 Message-Id: <1557999604-1117-5-git-send-email-fabrizio.castro@bp.renesas.com> X-Mailer: git-send-email 2.7.4 In-Reply-To: <1557999604-1117-1-git-send-email-fabrizio.castro@bp.renesas.com> References: <1557999604-1117-1-git-send-email-fabrizio.castro@bp.renesas.com> Cc: Biju Das Subject: [cip-dev] [PATCH v2 04/52] ARM: shmobile: r8a77470: Add clock index macros for DT sources X-BeenThere: cip-dev@lists.cip-project.org X-Mailman-Version: 2.1.12 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , MIME-Version: 1.0 Sender: cip-dev-bounces@lists.cip-project.org Errors-To: cip-dev-bounces@lists.cip-project.org X-Virus-Scanned: ClamAV using ClamSMTP Add macros usable by device tree sources to reference the r8a77470 clocks by index. Unfortunately there is nothing that we can backport from mainline for this, as the architecture of the clock driver has changed quite dramatically over time. Signed-off-by: Fabrizio Castro --- v1->v2: * Changed license for file include/dt-bindings/clock/r8a77470-clock.h from GPL-2.0+ to GPL-2.0 to make it match the license of the clock driver and the license of the DT file * Changed commit message to explain why we can't backport this --- include/dt-bindings/clock/r8a77470-clock.h | 139 +++++++++++++++++++++++++++++ 1 file changed, 139 insertions(+) create mode 100644 include/dt-bindings/clock/r8a77470-clock.h diff --git a/include/dt-bindings/clock/r8a77470-clock.h b/include/dt-bindings/clock/r8a77470-clock.h new file mode 100644 index 0000000..a22af15 --- /dev/null +++ b/include/dt-bindings/clock/r8a77470-clock.h @@ -0,0 +1,139 @@ +/* + * Copyright (C) 2019 Renesas Electronics Corporation + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License version 2 + * as published by the Free Software Foundation. + */ + +#ifndef __DT_BINDINGS_CLOCK_R8A77470_H__ +#define __DT_BINDINGS_CLOCK_R8A77470_H__ + +/* CPG */ +#define R8A77470_CLK_MAIN 0 +#define R8A77470_CLK_PLL0 1 +#define R8A77470_CLK_PLL1 2 +#define R8A77470_CLK_PLL3 3 +#define R8A77470_CLK_LB 4 +#define R8A77470_CLK_QSPI 5 +#define R8A77470_CLK_SDH 6 +#define R8A77470_CLK_SD0 7 +#define R8A77470_CLK_SD1 8 +#define R8A77470_CLK_RCAN 9 + +/* MSTP0 */ +#define R8A77470_CLK_MSIOF0 0 + +/* MSTP1 */ +#define R8A77470_CLK_VCP0 1 +#define R8A77470_CLK_VPC0 3 +#define R8A77470_CLK_STB 4 +#define R8A77470_CLK_TMU1 11 +#define R8A77470_CLK_3DG 12 +#define R8A77470_CLK_2DDMAC 15 +#define R8A77470_CLK_FDP1_0 19 +#define R8A77470_CLK_TMU3 21 +#define R8A77470_CLK_TMU2 22 +#define R8A77470_CLK_CMT0 24 +#define R8A77470_CLK_VSP1DU0 28 +#define R8A77470_CLK_VSP1_SY 31 + +/* MSTP2 */ +#define R8A77470_CLK_MSIOF2 5 +#define R8A77470_CLK_MSIOF1 8 +#define R8A77470_CLK_SYS_DMAC1 18 +#define R8A77470_CLK_SYS_DMAC0 19 + +/* MSTP3 */ +#define R8A77470_CLK_SDHI2 12 +#define R8A77470_CLK_SDHI1 13 +#define R8A77470_CLK_SDHI0 14 +#define R8A77470_CLK_USBHS_DMAC0_CH1 26 +#define R8A77470_CLK_USBHS_DMAC1_CH1 27 +#define R8A77470_CLK_CMT1 29 +#define R8A77470_CLK_USBHS_DMAC0_CH0 30 +#define R8A77470_CLK_USBHS_DMAC1_CH0 31 + +/* MSTP4 */ +#define R8A77470_CLK_RWDT 2 +#define R8A77470_CLK_USB_DDM0 6 +#define R8A77470_CLK_IRQC 7 +#define R8A77470_CLK_INTC_SYS 8 +#define R8A77470_CLK_USB_DDM1 9 + +/* MSTP5 */ +#define R8A77470_CLK_AUDIO_DMAC0 2 +#define R8A77470_CLK_PWM 23 +#define R8A77470_CLK_BOOT_ROM 30 + +/* MSTP7 */ +#define R8A77470_CLK_USB_EHCI_0 3 +#define R8A77470_CLK_USBHS0 4 +#define R8A77470_CLK_USB_EHCI_1 5 +#define R8A77470_CLK_USBHS1 6 +#define R8A77470_CLK_HSCIF2 13 +#define R8A77470_CLK_SCIF5 14 +#define R8A77470_CLK_SCIF4 15 +#define R8A77470_CLK_HSCIF1 16 +#define R8A77470_CLK_HSCIF0 17 +#define R8A77470_CLK_SCIF3 18 +#define R8A77470_CLK_SCIF2 19 +#define R8A77470_CLK_SCIF1 20 +#define R8A77470_CLK_SCIF0 21 +#define R8A77470_CLK_DU1 23 +#define R8A77470_CLK_DU0 24 +#define R8A77470_CLK_LVDS 26 +#define R8A77470_CLK_DVE 27 + +/* MSTP8 */ +#define R8A77470_CLK_IPMMU_SGX 0 +#define R8A77470_CLK_DVD 1 +#define R8A77470_CLK_VIN1 10 +#define R8A77470_CLK_VIN0 11 +#define R8A77470_CLK_ETHERAVB 12 +#define R8A77470_CLK_ETHER 13 + +/* MSTP9 */ +#define R8A77470_CLK_IR_RECEIVER 3 +#define R8A77470_CLK_GPIO5 7 +#define R8A77470_CLK_GPIO4 8 +#define R8A77470_CLK_GPIO3 9 +#define R8A77470_CLK_GPIO2 10 +#define R8A77470_CLK_GPIO1 11 +#define R8A77470_CLK_GPIO0 12 +#define R8A77470_CLK_CAN1 15 +#define R8A77470_CLK_CAN0 16 +#define R8A77470_CLK_QUAD_SPI1 17 +#define R8A77470_CLK_QUAD_SPI0 18 +#define R8A77470_CLK_ADG 22 +#define R8A77470_CLK_I2C4 27 +#define R8A77470_CLK_I2C3 28 +#define R8A77470_CLK_I2C2 29 +#define R8A77470_CLK_I2C1 30 +#define R8A77470_CLK_I2C0 31 + +/* MSTP10 */ +#define R8A77470_CLK_SSI_ALL 5 +#define R8A77470_CLK_SSI9 6 +#define R8A77470_CLK_SSI8 7 +#define R8A77470_CLK_SSI7 8 +#define R8A77470_CLK_SSI6 9 +#define R8A77470_CLK_SSI5 10 +#define R8A77470_CLK_SSI4 11 +#define R8A77470_CLK_SSI3 12 +#define R8A77470_CLK_SSI2 13 +#define R8A77470_CLK_SSI1 14 +#define R8A77470_CLK_SSI0 15 +#define R8A77470_CLK_SCU_ALL 17 +#define R8A77470_CLK_SCU_DVC1 18 +#define R8A77470_CLK_SCU_DVC0 19 +#define R8A77470_CLK_SCU_CTU1_MIX1 20 +#define R8A77470_CLK_SCU_CTU0_MIX0 21 +#define R8A77470_CLK_SCU_SRC6 25 +#define R8A77470_CLK_SCU_SRC5 26 +#define R8A77470_CLK_SCU_SRC4 27 +#define R8A77470_CLK_SCU_SRC3 28 +#define R8A77470_CLK_SCU_SRC2 29 +#define R8A77470_CLK_SCU_SRC1 30 + +#endif /* __DT_BINDINGS_CLOCK_R8A77470_H__ */