From patchwork Wed Aug 28 13:31:49 2019 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Fabrizio Castro X-Patchwork-Id: 11119017 X-Patchwork-Delegate: iwamatsu@nigauri.org Return-Path: Received: from mail.kernel.org (pdx-korg-mail-1.web.codeaurora.org [172.30.200.123]) by pdx-korg-patchwork-2.web.codeaurora.org (Postfix) with ESMTP id 0AB1918B7 for ; Wed, 28 Aug 2019 13:33:13 +0000 (UTC) Received: from mail.linuxfoundation.org (mail.linuxfoundation.org [140.211.169.12]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by mail.kernel.org (Postfix) with ESMTPS id E4BB922DA7 for ; Wed, 28 Aug 2019 13:33:12 +0000 (UTC) DMARC-Filter: OpenDMARC Filter v1.3.2 mail.kernel.org E4BB922DA7 Authentication-Results: mail.kernel.org; dmarc=none (p=none dis=none) header.from=bp.renesas.com Authentication-Results: mail.kernel.org; spf=none smtp.mailfrom=cip-dev-bounces@lists.cip-project.org Received: from mail.linux-foundation.org (localhost [127.0.0.1]) by mail.linuxfoundation.org (Postfix) with ESMTP id 300912F7E; Wed, 28 Aug 2019 13:33:11 +0000 (UTC) X-Original-To: cip-dev@lists.cip-project.org Delivered-To: cip-dev@mail.linuxfoundation.org Received: from smtp1.linuxfoundation.org (smtp1.linux-foundation.org [172.17.192.35]) by mail.linuxfoundation.org (Postfix) with ESMTPS id B7FAD2A82 for ; Wed, 28 Aug 2019 13:32:50 +0000 (UTC) X-Greylist: domain auto-whitelisted by SQLgrey-1.7.6 Received: from relmlie5.idc.renesas.com (relmlor1.renesas.com [210.160.252.171]) by smtp1.linuxfoundation.org (Postfix) with ESMTP id 31FB08A6 for ; Wed, 28 Aug 2019 13:32:50 +0000 (UTC) X-IronPort-AV: E=Sophos;i="5.64,441,1559487600"; d="scan'208";a="25154950" Received: from unknown (HELO relmlir6.idc.renesas.com) ([10.200.68.152]) by relmlie5.idc.renesas.com with ESMTP; 28 Aug 2019 22:32:49 +0900 Received: from fabrizio-dev.ree.adwin.renesas.com (unknown [10.226.36.196]) by relmlir6.idc.renesas.com (Postfix) with ESMTP id E2F99425E317; Wed, 28 Aug 2019 22:32:48 +0900 (JST) From: Fabrizio Castro To: cip-dev@lists.cip-project.org Date: Wed, 28 Aug 2019 14:31:49 +0100 Message-Id: <1566999164-27898-3-git-send-email-fabrizio.castro@bp.renesas.com> X-Mailer: git-send-email 2.7.4 In-Reply-To: <1566999164-27898-1-git-send-email-fabrizio.castro@bp.renesas.com> References: <1566999164-27898-1-git-send-email-fabrizio.castro@bp.renesas.com> X-Spam-Status: No, score=-1.9 required=5.0 tests=BAYES_00,RCVD_IN_DNSWL_NONE autolearn=ham version=3.3.1 X-Spam-Checker-Version: SpamAssassin 3.3.1 (2010-03-16) on smtp1.linux-foundation.org Cc: Biju Das Subject: [cip-dev] [PATCH 4.19.y-cip v2 02/57] dt-bindings: can: rcar_can: Fix RZ/G2 CAN clocks X-BeenThere: cip-dev@lists.cip-project.org X-Mailman-Version: 2.1.12 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , MIME-Version: 1.0 Sender: cip-dev-bounces@lists.cip-project.org Errors-To: cip-dev-bounces@lists.cip-project.org commit e6aacf9a52e0b013835c7e33538bcdf0703bbe2e upstream. According to the latest information, the clock options for CAN on RZ/G2 are the same as the ones available on R-Car Gen3 Fixes: 868b7c0f43e6 ("dt-bindings: can: rcar_can: Add r8a774a1 support") Signed-off-by: Fabrizio Castro Reviewed-by: Chris Paterson Reviewed-by: Rob Herring Acked-by: David S. Miller Signed-off-by: Simon Horman --- Documentation/devicetree/bindings/net/can/rcar_can.txt | 12 +++--------- 1 file changed, 3 insertions(+), 9 deletions(-) diff --git a/Documentation/devicetree/bindings/net/can/rcar_can.txt b/Documentation/devicetree/bindings/net/can/rcar_can.txt index f3b160c..a7b01bf 100644 --- a/Documentation/devicetree/bindings/net/can/rcar_can.txt +++ b/Documentation/devicetree/bindings/net/can/rcar_can.txt @@ -25,13 +25,8 @@ Required properties: - reg: physical base address and size of the R-Car CAN register map. - interrupts: interrupt specifier for the sole interrupt. -- clocks: phandles and clock specifiers for 2 CAN clock inputs for RZ/G2 - devices. - phandles and clock specifiers for 3 CAN clock inputs for every other - SoC. -- clock-names: 2 clock input name strings for RZ/G2: "clkp1", "can_clk". - 3 clock input name strings for every other SoC: "clkp1", "clkp2", - "can_clk". +- clocks: phandles and clock specifiers for 3 CAN clock inputs. +- clock-names: 3 clock input name strings: "clkp1", "clkp2", and "can_clk". - pinctrl-0: pin control group to be used for this controller. - pinctrl-names: must be "default". @@ -48,8 +43,7 @@ using the below properties: Optional properties: - renesas,can-clock-select: R-Car CAN Clock Source Select. Valid values are: <0x0> (default) : Peripheral clock (clkp1) - <0x1> : Peripheral clock (clkp2) (not supported by - RZ/G2 devices) + <0x1> : Peripheral clock (clkp2) <0x3> : External input clock Example