From patchwork Thu Oct 10 06:45:14 2019 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Biju Das X-Patchwork-Id: 11182717 X-Patchwork-Delegate: chris.paterson2@renesas.com Return-Path: Received: from mail.kernel.org (pdx-korg-mail-1.web.codeaurora.org [172.30.200.123]) by pdx-korg-patchwork-2.web.codeaurora.org (Postfix) with ESMTP id C1A8017D4 for ; Thu, 10 Oct 2019 06:45:55 +0000 (UTC) Received: from mail.linuxfoundation.org (mail.linuxfoundation.org [140.211.169.12]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by mail.kernel.org (Postfix) with ESMTPS id AA26F205F4 for ; Thu, 10 Oct 2019 06:45:55 +0000 (UTC) DMARC-Filter: OpenDMARC Filter v1.3.2 mail.kernel.org AA26F205F4 Authentication-Results: mail.kernel.org; dmarc=none (p=none dis=none) header.from=bp.renesas.com Authentication-Results: mail.kernel.org; spf=none smtp.mailfrom=cip-dev-bounces@lists.cip-project.org Received: from mail.linux-foundation.org (localhost [127.0.0.1]) by mail.linuxfoundation.org (Postfix) with ESMTP id 25FC9F21; Thu, 10 Oct 2019 06:45:55 +0000 (UTC) X-Original-To: cip-dev@lists.cip-project.org Delivered-To: cip-dev@mail.linuxfoundation.org Received: from smtp2.linuxfoundation.org (smtp2.linux-foundation.org [172.17.192.36]) by mail.linuxfoundation.org (Postfix) with ESMTPS id 02F9BEDA for ; Thu, 10 Oct 2019 06:45:54 +0000 (UTC) X-Greylist: domain auto-whitelisted by SQLgrey-1.7.6 Received: from relmlie6.idc.renesas.com (relmlor2.renesas.com [210.160.252.172]) by smtp2.linuxfoundation.org (Postfix) with ESMTP id 723B81DD4F for ; Thu, 10 Oct 2019 06:45:53 +0000 (UTC) X-IronPort-AV: E=Sophos;i="5.67,279,1566831600"; d="scan'208";a="28540886" Received: from unknown (HELO relmlir5.idc.renesas.com) ([10.200.68.151]) by relmlie6.idc.renesas.com with ESMTP; 10 Oct 2019 15:45:52 +0900 Received: from be1yocto.ree.adwin.renesas.com (unknown [172.29.43.62]) by relmlir5.idc.renesas.com (Postfix) with ESMTP id A7A8840065DE; Thu, 10 Oct 2019 15:45:50 +0900 (JST) From: Biju Das To: cip-dev@lists.cip-project.org, Nobuhiro Iwamatsu , Pavel Machek Date: Thu, 10 Oct 2019 07:45:14 +0100 Message-Id: <1570689915-14149-3-git-send-email-biju.das@bp.renesas.com> X-Mailer: git-send-email 2.7.4 In-Reply-To: <1570689915-14149-1-git-send-email-biju.das@bp.renesas.com> References: <1570689915-14149-1-git-send-email-biju.das@bp.renesas.com> X-Spam-Status: No, score=-1.9 required=5.0 tests=BAYES_00,RCVD_IN_DNSWL_NONE autolearn=ham version=3.3.1 X-Spam-Checker-Version: SpamAssassin 3.3.1 (2010-03-16) on smtp2.linux-foundation.org Cc: Biju Das Subject: [cip-dev] [PATCH 4.19.y-cip 2/3] arm64: dts: renesas: hihope-common: Add BT support X-BeenThere: cip-dev@lists.cip-project.org X-Mailman-Version: 2.1.12 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , MIME-Version: 1.0 Sender: cip-dev-bounces@lists.cip-project.org Errors-To: cip-dev-bounces@lists.cip-project.org commit d112c20925443b4a8876b101e5b7b13ef105057e upstream. This patch enables BT support for the HiHope RZ/G2[MN] boards. Signed-off-by: Biju Das Signed-off-by: Geert Uytterhoeven --- arch/arm64/boot/dts/renesas/hihope-common.dtsi | 26 ++++++++++++++++++++++++++ 1 file changed, 26 insertions(+) diff --git a/arch/arm64/boot/dts/renesas/hihope-common.dtsi b/arch/arm64/boot/dts/renesas/hihope-common.dtsi index a13cb88..76f7a9a 100644 --- a/arch/arm64/boot/dts/renesas/hihope-common.dtsi +++ b/arch/arm64/boot/dts/renesas/hihope-common.dtsi @@ -10,6 +10,7 @@ / { aliases { serial0 = &scif2; + serial1 = &hscif0; }; chosen { @@ -31,6 +32,13 @@ leds { compatible = "gpio-leds"; + bt_active_led { + label = "blue:bt"; + gpios = <&gpio7 0 GPIO_ACTIVE_HIGH>; + linux,default-trigger = "hci0-power"; + default-state = "off"; + }; + led0 { gpios = <&gpio6 11 GPIO_ACTIVE_HIGH>; }; @@ -153,6 +161,19 @@ }; }; +&hscif0 { + pinctrl-0 = <&hscif0_pins>; + pinctrl-names = "default"; + + uart-has-rtscts; + status = "okay"; + + bluetooth { + compatible = "ti,wl1837-st"; + enable-gpios = <&gpio_expander 2 GPIO_ACTIVE_HIGH>; + }; +}; + &hsusb { dr_mode = "otg"; status = "okay"; @@ -194,6 +215,11 @@ pinctrl-0 = <&scif_clk_pins>; pinctrl-names = "default"; + hscif0_pins: hscif0 { + groups = "hscif0_data", "hscif0_ctrl"; + function = "hscif0"; + }; + scif2_pins: scif2 { groups = "scif2_data_a"; function = "scif2";