| Message ID | 1573115572-13513-34-git-send-email-biju.das@bp.renesas.com (mailing list archive) |
|---|---|
| State | Accepted |
| Headers | show |
| Series | Add RZ/G1C SD/eMMC support | expand |
On Thu 2019-11-07 08:32:02, Biju Das wrote: > From: Wolfram Sang <wsa+renesas@sang-engineering.com> > > commit 0bc0b6e86524526c92a9409faea79d53db8e7e6e upstream. > > We need to add R1 without CRC support, refactor the bus width routine a > little and extend a quirk check. To support "non-removable;" we need a > workaround which will be hopefully removed when reworking PM soon. > index addbc71..eafd92d 100644 > --- a/drivers/mmc/host/tmio_mmc.h > +++ b/drivers/mmc/host/tmio_mmc.h > @@ -79,6 +79,9 @@ > #define CLK_CTL_DIV_MASK 0xff > #define CLK_CTL_SCLKEN BIT(8) > > +#define CARD_OPT_WIDTH8 BIT(13) > +#define CARD_OPT_WIDTH BIT(15) WIDTH_1 and WIDTH_8 would be better names, for consistency with rest of code. "WIDTH" without number is quite confusing. Best regards, Pavel > + /* Some hardware cannot perform 2 byte requests in 4/8 bit mode */ > + if (host->mmc->ios.bus_width == MMC_BUS_WIDTH_4 || > + host->mmc->ios.bus_width == MMC_BUS_WIDTH_8) {
Hi Pavel, > Subject: Re: [PATCH 4.4.y-cip 33/83] mmc: tmio: add eMMC support > > On Thu 2019-11-07 08:32:02, Biju Das wrote: > > From: Wolfram Sang <wsa+renesas@sang-engineering.com> > > > > commit 0bc0b6e86524526c92a9409faea79d53db8e7e6e upstream. > > > > We need to add R1 without CRC support, refactor the bus width routine > > a little and extend a quirk check. To support "non-removable;" we need > > a workaround which will be hopefully removed when reworking PM soon. > > > index addbc71..eafd92d 100644 > > --- a/drivers/mmc/host/tmio_mmc.h > > +++ b/drivers/mmc/host/tmio_mmc.h > > @@ -79,6 +79,9 @@ > > #define CLK_CTL_DIV_MASK 0xff > > #define CLK_CTL_SCLKEN BIT(8) > > > > +#define CARD_OPT_WIDTH8 BIT(13) > > +#define CARD_OPT_WIDTH BIT(15) > > WIDTH_1 and WIDTH_8 would be better names, for consistency with rest of > code. "WIDTH" without number is quite confusing. I agree, it is little bit confusing. May be we should fixing this Mainline first and then backport to cip kernel. Cheers, Biju > > + /* Some hardware cannot perform 2 byte requests in 4/8 bit mode > */ > > + if (host->mmc->ios.bus_width == MMC_BUS_WIDTH_4 || > > + host->mmc->ios.bus_width == MMC_BUS_WIDTH_8) { > > -- > DENX Software Engineering GmbH, Managing Director: Wolfgang Denk > HRB 165235 Munich, Office: Kirchenstr.5, D-82194 Groebenzell, Germany
diff --git a/drivers/mmc/host/tmio_mmc.h b/drivers/mmc/host/tmio_mmc.h index addbc71..eafd92d 100644 --- a/drivers/mmc/host/tmio_mmc.h +++ b/drivers/mmc/host/tmio_mmc.h @@ -79,6 +79,9 @@ #define CLK_CTL_DIV_MASK 0xff #define CLK_CTL_SCLKEN BIT(8) +#define CARD_OPT_WIDTH8 BIT(13) +#define CARD_OPT_WIDTH BIT(15) + #define TMIO_BBS 512 /* Boot block size */ /* Definitions for values the CTRL_SDIO_STATUS register can take. */ diff --git a/drivers/mmc/host/tmio_mmc_pio.c b/drivers/mmc/host/tmio_mmc_pio.c index d499ed2..c927916 100644 --- a/drivers/mmc/host/tmio_mmc_pio.c +++ b/drivers/mmc/host/tmio_mmc_pio.c @@ -336,7 +336,9 @@ static int tmio_mmc_start_command(struct tmio_mmc_host *host, struct mmc_command switch (mmc_resp_type(cmd)) { case MMC_RSP_NONE: c |= RESP_NONE; break; - case MMC_RSP_R1: c |= RESP_R1; break; + case MMC_RSP_R1: + case MMC_RSP_R1_NO_CRC: + c |= RESP_R1; break; case MMC_RSP_R1B: c |= RESP_R1B; break; case MMC_RSP_R2: c |= RESP_R2; break; case MMC_RSP_R3: c |= RESP_R3; break; @@ -733,12 +735,13 @@ static int tmio_mmc_start_data(struct tmio_mmc_host *host, pr_debug("setup data transfer: blocksize %08x nr_blocks %d\n", data->blksz, data->blocks); - /* Some hardware cannot perform 2 byte requests in 4 bit mode */ - if (host->mmc->ios.bus_width == MMC_BUS_WIDTH_4) { + /* Some hardware cannot perform 2 byte requests in 4/8 bit mode */ + if (host->mmc->ios.bus_width == MMC_BUS_WIDTH_4 || + host->mmc->ios.bus_width == MMC_BUS_WIDTH_8) { int blksz_2bytes = pdata->flags & TMIO_MMC_BLKSZ_2BYTES; if (data->blksz < 2 || (data->blksz < 4 && !blksz_2bytes)) { - pr_err("%s: %d byte block unsupported in 4 bit mode\n", + pr_err("%s: %d byte block unsupported in 4/8 bit mode\n", mmc_hostname(host->mmc), data->blksz); return -EINVAL; } @@ -860,14 +863,16 @@ static void tmio_mmc_power_off(struct tmio_mmc_host *host) static void tmio_mmc_set_bus_width(struct tmio_mmc_host *host, unsigned char bus_width) { - switch (bus_width) { - case MMC_BUS_WIDTH_1: - sd_ctrl_write16(host, CTL_SD_MEM_CARD_OPT, 0x80e0); - break; - case MMC_BUS_WIDTH_4: - sd_ctrl_write16(host, CTL_SD_MEM_CARD_OPT, 0x00e0); - break; - } + u16 reg = sd_ctrl_read16(host, CTL_SD_MEM_CARD_OPT) + & ~(CARD_OPT_WIDTH | CARD_OPT_WIDTH8); + + /* reg now applies to MMC_BUS_WIDTH_4 */ + if (bus_width == MMC_BUS_WIDTH_1) + reg |= CARD_OPT_WIDTH; + else if (bus_width == MMC_BUS_WIDTH_8) + reg |= CARD_OPT_WIDTH8; + + sd_ctrl_write16(host, CTL_SD_MEM_CARD_OPT, reg); } /* Set MMC clock / power. @@ -1085,6 +1090,15 @@ int tmio_mmc_host_probe(struct tmio_mmc_host *_host, mmc->caps & MMC_CAP_NONREMOVABLE || mmc->slot.cd_irq >= 0); + /* + * On Gen2+, eMMC with NONREMOVABLE currently fails because native + * hotplug gets disabled. It seems RuntimePM related yet we need further + * research. Since we are planning a PM overhaul anyway, let's enforce + * for now the device being active by enabling native hotplug always. + */ + if (pdata->flags & TMIO_MMC_MIN_RCAR2) + _host->native_hotplug = true; + if (tmio_mmc_clk_enable(_host) < 0) { mmc->f_max = pdata->hclk; mmc->f_min = mmc->f_max / 512;