[4.4.y-cip,01/21] ARM: shmobile: Document RZ/G1N SoC DT binding

From: Geert Uytterhoeven <geert+renesas@glider.be>

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From: Biju Das <biju.das@bp.renesas.com>
To: cip-dev@lists.cip-project.org,
	Nobuhiro Iwamatsu <nobuhiro1.iwamatsu@toshiba.co.jp>,
	Pavel Machek <pavel@denx.de>
Date: Thu, 14 Nov 2019 13:24:17 +0000
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Cc: Biju Das <biju.das@bp.renesas.com>
Subject: [cip-dev] [PATCH 4.4.y-cip 01/21] ARM: shmobile: Document RZ/G1N
	SoC DT binding
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Headers	show Return-Path: <SRS0=9M2x=ZG=lists.cip-project.org=cip-dev-bounces@kernel.org> DMARC-Filter: OpenDMARC Filter v1.3.2 mail.kernel.org E50FB2072E From: Biju Das <biju.das@bp.renesas.com> To: cip-dev@lists.cip-project.org, Nobuhiro Iwamatsu <nobuhiro1.iwamatsu@toshiba.co.jp>, Pavel Machek <pavel@denx.de> Date: Thu, 14 Nov 2019 13:24:17 +0000 Message-Id: <1573737877-11733-2-git-send-email-biju.das@bp.renesas.com> In-Reply-To: <1573737877-11733-1-git-send-email-biju.das@bp.renesas.com> References: <1573737877-11733-1-git-send-email-biju.das@bp.renesas.com> Cc: Biju Das <biju.das@bp.renesas.com> Subject: [cip-dev] [PATCH 4.4.y-cip 01/21] ARM: shmobile: Document RZ/G1N SoC DT binding Precedence: list MIME-Version: 1.0 Content-Type: text/plain; charset="us-ascii" Content-Transfer-Encoding: 7bit Sender: cip-dev-bounces@lists.cip-project.org Errors-To: cip-dev-bounces@lists.cip-project.org
Series	Add iWave RZ/G1N support \| expand [4.4.y-cip,00/21] Add iWave RZ/G1N support [4.4.y-cip,01/21] ARM: shmobile: Document RZ/G1N SoC DT binding [4.4.y-cip,02/21] dt-bindings: reset: rcar-rst: Document r8a7744 reset module [4.4.y-cip,03/21] soc: renesas: rcar-rst: Add support for RZ/G1N [4.4.y-cip,04/21] ARM: shmobile: r8a7744: Add clock index macros for DT sources [4.4.y-cip,05/21] clk: shmobile: Compile clk-rcar-gen2.c when using the r8a7744 [4.4.y-cip,06/21] ARM: shmobile: r8a7744: Basic SoC support [4.4.y-cip,07/21] clk: shmobile: Document r8a7744 CPG clock support [4.4.y-cip,08/21] clk: shmobile: Document r8a7744 MSTP clock support [4.4.y-cip,09/21] clk: shmobile: Document r8a7744 CPG DIV6 clock support [4.4.y-cip,10/21] ARM: multi_v7_defconfig: Enable r8a7744 SoC [4.4.y-cip,11/21] ARM: shmobile: defconfig: Enable r8a7744 SoC [4.4.y-cip,12/21] ARM: debug-ll: Add support for r8a7744 [4.4.y-cip,13/21] dt-bindings: pinctrl: sh-pfc: Document r8a7744 PFC support [4.4.y-cip,14/21] pinctrl: sh-pfc: r8a7791: Add r8a7744 support [4.4.y-cip,15/21] ARM: dts: iwg20d-q7-common: Move pciec node out of common dtsi [4.4.y-cip,16/21] dt-bindings: serial: sh-sci: Document r8a7744 bindings [4.4.y-cip,17/21] ARM: dts: r8a7744: Initial SoC device tree [4.4.y-cip,18/21] dt-bindings: arm: renesas: Document iWave RZ/G1N SOM [4.4.y-cip,19/21] dt-bindings: arm: renesas: Document iW-RainboW-G20D-Qseven-RZG1N board [4.4.y-cip,20/21] ARM: dts: r8a7744-iwg20m: Add iWave RZ/G1N Qseven SOM [4.4.y-cip,21/21] ARM: dts: r8a7744-iwg20d-q7: Add support for iWave G20D-Q7 board based on RZ/G1N

[4.4.y-cip,01/21] ARM: shmobile: Document RZ/G1N SoC DT binding

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