Message ID | 1579187482-4626-3-git-send-email-prabhakar.mahadev-lad.rj@bp.renesas.com (mailing list archive) |
---|---|
State | Accepted |
Delegated to: | Pavel Machek |
Headers | show |
Series | Renesas RZ/G2E backport IPA support along with minor fixes | expand |
diff --git a/Documentation/devicetree/bindings/net/can/rcar_can.txt b/Documentation/devicetree/bindings/net/can/rcar_can.txt index 2301331..aede950 100644 --- a/Documentation/devicetree/bindings/net/can/rcar_can.txt +++ b/Documentation/devicetree/bindings/net/can/rcar_can.txt @@ -31,7 +31,7 @@ Required properties: - pinctrl-0: pin control group to be used for this controller. - pinctrl-names: must be "default". -Required properties for R8A7795 and R8A7796: +Required properties for R8A774A1, R8A774C0, R8A7795, and R8A7796: For the denoted SoCs, "clkp2" can be CANFD clock. This is a div6 clock and can be used by both CAN and CAN FD controller at the same time. It needs to be scaled to maximum frequency if any of these controllers use it. This is done