From patchwork Wed Jul 8 15:45:43 2020 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Chen-Yu Tsai X-Patchwork-Id: 11651835 Return-Path: Received: from mail.kernel.org (pdx-korg-mail-1.web.codeaurora.org [172.30.200.123]) by pdx-korg-patchwork-2.web.codeaurora.org (Postfix) with ESMTP id 09A2F14E3 for ; Wed, 8 Jul 2020 15:46:33 +0000 (UTC) Received: from web01.groups.io (web01.groups.io [66.175.222.12]) (using TLSv1.2 with cipher ECDHE-RSA-AES128-GCM-SHA256 (128/128 bits)) (No client certificate requested) by mail.kernel.org (Postfix) with ESMTPS id D7C57207D0 for ; Wed, 8 Jul 2020 15:46:30 +0000 (UTC) Authentication-Results: mail.kernel.org; dkim=pass (1024-bit key) header.d=lists.cip-project.org header.i=@lists.cip-project.org header.b="DGdVi5AC" DMARC-Filter: OpenDMARC Filter v1.3.2 mail.kernel.org D7C57207D0 Authentication-Results: mail.kernel.org; dmarc=none (p=none dis=none) header.from=csie.org Authentication-Results: mail.kernel.org; spf=pass smtp.mailfrom=bounce+64572+4894+4520428+8129116@lists.cip-project.org X-Received: by 127.0.0.2 with SMTP id mh9XYY4521763x8b8XNnE1PE; Wed, 08 Jul 2020 08:46:30 -0700 X-Received: from wens.tw (wens.tw [140.112.194.72]) by mx.groups.io with SMTP id smtpd.web10.13562.1594223182774084191 for ; Wed, 08 Jul 2020 08:46:23 -0700 X-Received: by wens.tw (Postfix, from userid 1000) id 6840060265; Wed, 8 Jul 2020 23:46:17 +0800 (CST) From: "Chen-Yu Tsai (Moxa)" To: nobuhiro1.iwamatsu@toshiba.co.jp, pavel@denx.de Cc: cip-dev@lists.cip-project.org, JohnsonCH.Chen@moxa.com Subject: [cip-dev] [PATCH 4.4.y-cip 12/23] cpufreq: dt: Unsupported OPPs are already disabled Date: Wed, 8 Jul 2020 23:45:43 +0800 Message-Id: <20200708154554.26450-13-wens@csie.org> In-Reply-To: <20200708154554.26450-1-wens@csie.org> References: <20200708154554.26450-1-wens@csie.org> MIME-Version: 1.0 Precedence: Bulk List-Unsubscribe: Sender: cip-dev@lists.cip-project.org List-Id: Mailing-List: list cip-dev@lists.cip-project.org; contact cip-dev+owner@lists.cip-project.org Delivered-To: mailing list cip-dev@lists.cip-project.org Reply-To: cip-dev@lists.cip-project.org X-Gm-Message-State: 5CMXNT8Xtd5g8JctzHxvBPKpx4520428AA= DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=lists.cip-project.org; q=dns/txt; s=20140610; t=1594223190; bh=4PJtQ0+i1Ep10WHoEOpjGKWtvXOMves9OyU1Ianzqfc=; h=Cc:Content-Type:Date:From:Reply-To:Subject:To; b=DGdVi5AC640jbGkVxv8ImR3qfsoVG3IvI1nfg9QhleCu7dpS7Iqq+1wpBYccJjpIXmZ zLGCBec8JilEBuPzcvnxDDQ8yfIu/O5Yn0nSjKZYmK3aYnJ80Xoy6ozCS9utpGlb+Ud3N 9ZErWMOWONvNgj6FAdEb9MiMEezQb8N23VY= From: Viresh Kumar commit 6def6ea75e6dea45f01a16ae3cfb5b5ce48dd5e9 upstream. The core already have a valid regulator set for the device opp and the unsupported OPPs are already disabled by the core. There is no need to repeat that in the user drivers, get rid of it. Signed-off-by: Viresh Kumar Reviewed-by: Stephen Boyd Signed-off-by: Rafael J. Wysocki Signed-off-by: Chen-Yu Tsai (Moxa) --- drivers/cpufreq/cpufreq-dt.c | 2 -- 1 file changed, 2 deletions(-) diff --git a/drivers/cpufreq/cpufreq-dt.c b/drivers/cpufreq/cpufreq-dt.c index 2af75f8088bbb..c3fe89461ff45 100644 --- a/drivers/cpufreq/cpufreq-dt.c +++ b/drivers/cpufreq/cpufreq-dt.c @@ -349,8 +349,6 @@ static int cpufreq_init(struct cpufreq_policy *policy) min_uV = opp_uV; if (opp_uV > max_uV) max_uV = opp_uV; - } else { - dev_pm_opp_disable(cpu_dev, opp_freq); } opp_freq++;